From: Keith Packard <keithpac@amazon.com>
To: linux-kernel@vger.kernel.org
Cc: "Abbott Liu" <liuwenliang@huawei.com>,
"Andrew Morton" <akpm@linux-foundation.org>,
"Andrey Ryabinin" <ryabinin.a.a@gmail.com>,
"Anshuman Khandual" <anshuman.khandual@arm.com>,
"Ard Biesheuvel" <ardb@kernel.org>,
"Arnd Bergmann" <arnd@arndb.de>,
"Bjorn Andersson" <bjorn.andersson@linaro.org>,
"Christoph Lameter" <cl@linux.com>,
"Dennis Zhou" <dennis@kernel.org>,
"Geert Uytterhoeven" <geert+renesas@glider.be>,
"Jens Axboe" <axboe@kernel.dk>, "Joe Perches" <joe@perches.com>,
"Kees Cook" <keescook@chromium.org>,
"Keith Packard" <keithpac@amazon.com>,
"Krzysztof Kozlowski" <krzysztof.kozlowski@canonical.com>,
"Linus Walleij" <linus.walleij@linaro.org>,
linux-arm-kernel@lists.infradead.org, linux-mm@kvack.org,
"Manivannan Sadhasivam" <mani@kernel.org>,
"Marc Zyngier" <maz@kernel.org>,
"Masahiro Yamada" <masahiroy@kernel.org>,
"Mike Rapoport" <rppt@kernel.org>,
"Nathan Chancellor" <nathan@kernel.org>,
"Nick Desaulniers" <ndesaulniers@google.com>,
"Nick Desaulniers" <ndesaulniers@gooogle.com>,
"Nicolas Pitre" <nico@fluxnic.net>,
"Russell King" <linux@armlinux.org.uk>,
"Tejun Heo" <tj@kernel.org>,
"Thomas Gleixner" <tglx@linutronix.de>,
"Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>,
"Valentin Schneider" <valentin.schneider@arm.com>,
"Viresh Kumar" <viresh.kumar@linaro.org>,
"Wolfram Sang (Renesas)" <wsa+renesas@sang-engineering.com>,
"YiFei Zhu" <yifeifz2@illinois.edu>
Subject: [PATCH 6/7] ARM: Use TPIDRPRW for current
Date: Tue, 7 Sep 2021 15:00:37 -0700 [thread overview]
Message-ID: <20210907220038.91021-7-keithpac@amazon.com> (raw)
In-Reply-To: <20210907220038.91021-1-keithpac@amazon.com>
Store current task pointer in CPU thread ID register TPIDRPRW so that
accessing it doesn't depend on being able to locate thread_info off of
the kernel stack pointer.
Signed-off-by: Keith Packard <keithpac@amazon.com>
---
arch/arm/Kconfig | 4 +++
arch/arm/include/asm/assembler.h | 8 +++++
arch/arm/include/asm/current.h | 52 ++++++++++++++++++++++++++++++++
arch/arm/kernel/entry-armv.S | 4 +++
arch/arm/kernel/setup.c | 1 +
arch/arm/kernel/smp.c | 1 +
6 files changed, 70 insertions(+)
create mode 100644 arch/arm/include/asm/current.h
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 24804f11302d..414fe23fd5ac 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1172,6 +1172,10 @@ config SMP_ON_UP
If you don't know what to do here, say Y.
+config CURRENT_POINTER_IN_TPIDRPRW
+ def_bool y
+ depends on (CPU_V6K || CPU_V7) && !CPU_V6
+
config ARM_CPU_TOPOLOGY
bool "Support cpu topology definition"
depends on SMP && CPU_V7
diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/assembler.h
index e2b1fd558bf3..ea12fe3bb589 100644
--- a/arch/arm/include/asm/assembler.h
+++ b/arch/arm/include/asm/assembler.h
@@ -209,6 +209,14 @@
mov \rd, \rd, lsl #THREAD_SIZE_ORDER + PAGE_SHIFT
.endm
+/*
+ * Set current task_info
+ * @src: Source register containing task_struct pointer
+ */
+ .macro set_current src : req
+ mcr p15, 0, \src, c13, c0, 4
+ .endm
+
/*
* Increment/decrement the preempt count.
*/
diff --git a/arch/arm/include/asm/current.h b/arch/arm/include/asm/current.h
new file mode 100644
index 000000000000..153a2ea18747
--- /dev/null
+++ b/arch/arm/include/asm/current.h
@@ -0,0 +1,52 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright © 2021 Keith Packard <keithp@keithp.com>
+ */
+
+#ifndef _ASM_ARM_CURRENT_H_
+#define _ASM_ARM_CURRENT_H_
+
+#ifndef __ASSEMBLY__
+
+register unsigned long current_stack_pointer asm ("sp");
+
+/*
+ * Same as asm-generic/current.h, except that we store current
+ * in TPIDRPRW. TPIDRPRW only exists on V6K and V7
+ */
+#ifdef CONFIG_CURRENT_POINTER_IN_TPIDRPRW
+
+struct task_struct;
+
+static inline void set_current(struct task_struct *tsk)
+{
+ /* Set TPIDRPRW */
+ asm volatile("mcr p15, 0, %0, c13, c0, 4" : : "r" (tsk) : "memory");
+}
+
+static __always_inline struct task_struct *get_current(void)
+{
+ struct task_struct *tsk;
+
+ /*
+ * Read TPIDRPRW.
+ * We want to allow caching the value, so avoid using volatile and
+ * instead use a fake stack read to hazard against barrier().
+ */
+ asm("mrc p15, 0, %0, c13, c0, 4" : "=r" (tsk)
+ : "Q" (*(const unsigned long *)current_stack_pointer));
+
+ return tsk;
+}
+#define current get_current()
+#else
+
+#define set_current(tsk) do {} while (0)
+
+#include <asm-generic/current.h>
+
+#endif /* CONFIG_SMP */
+
+#endif /* __ASSEMBLY__ */
+
+#endif /* _ASM_ARM_CURRENT_H_ */
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index 0ea8529a4872..db3947ee9c3e 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -761,6 +761,10 @@ ENTRY(__switch_to)
ldr r6, [r2, #TI_CPU_DOMAIN]
#endif
switch_tls r1, r4, r5, r3, r7
+#ifdef CONFIG_CURRENT_POINTER_IN_TPIDRPRW
+ ldr r7, [r2, #TI_TASK]
+ set_current r7
+#endif
#if defined(CONFIG_STACKPROTECTOR) && !defined(CONFIG_SMP)
ldr r7, [r2, #TI_TASK]
ldr r8, =__stack_chk_guard
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index d0dc60afe54f..2fdf8c31d6c9 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -586,6 +586,7 @@ void __init smp_setup_processor_id(void)
u32 mpidr = is_smp() ? read_cpuid_mpidr() & MPIDR_HWID_BITMASK : 0;
u32 cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0);
+ set_current(&init_task);
cpu_logical_map(0) = cpu;
for (i = 1; i < nr_cpu_ids; ++i)
cpu_logical_map(i) = i == cpu ? 0 : i;
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index 8ccf10b34f08..09771916442a 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -410,6 +410,7 @@ asmlinkage void secondary_start_kernel(unsigned int cpu, struct task_struct *tas
{
struct mm_struct *mm = &init_mm;
+ set_current(task);
secondary_biglittle_init();
/*
--
2.33.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-09-07 22:04 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-02 15:54 [PATCH 0/2]: ARM: Enable THREAD_INFO_IN_TASK Keith Packard
2021-09-02 15:54 ` [PATCH 1/2] ARM: Add per-cpu variable holding cpu number Keith Packard
2021-09-02 15:54 ` [PATCH 2/2] ARM: Move thread_info into task_struct Keith Packard
2021-09-02 16:07 ` [PATCH 0/2]: ARM: Enable THREAD_INFO_IN_TASK Kees Cook
2021-09-02 16:18 ` Ard Biesheuvel
2021-09-02 17:37 ` Kees Cook
2021-09-02 16:54 ` Russell King (Oracle)
2021-09-02 16:53 ` Russell King (Oracle)
2021-09-02 17:35 ` Kees Cook
2021-09-02 17:58 ` Keith Packard
2021-09-04 6:09 ` [PATCH 0/2] ARM: support THREAD_INFO_IN_TASK (v7 only) (v2) Keith Packard
2021-09-04 6:09 ` [PATCH 1/3] ARM: Pass cpu number to secondary_start_kernel Keith Packard
2021-09-05 20:25 ` Ard Biesheuvel
2021-09-04 6:09 ` [PATCH 2/3] ARM: Move thread_info into task_struct (v7 only) Keith Packard
2021-09-05 20:56 ` Ard Biesheuvel
2021-09-06 6:14 ` Keith Packard
2021-09-06 7:49 ` Ard Biesheuvel
2021-09-07 15:24 ` Keith Packard
2021-09-07 16:05 ` Ard Biesheuvel
2021-09-07 22:17 ` Keith Packard
2021-09-06 6:20 ` Keith Packard
2021-09-04 6:09 ` [PATCH 3/3] ARM: Add per-cpu variable cpu_number " Keith Packard
2021-09-07 22:00 ` [PATCH 0/7] ARM: support THREAD_INFO_IN_TASK (v3) Keith Packard
2021-09-07 22:00 ` [PATCH 1/7] ARM: Pass cpu number to secondary_start_kernel Keith Packard
2021-09-07 22:00 ` [PATCH 2/7] ARM: Pass task " Keith Packard
2021-09-07 22:00 ` [PATCH 3/7] ARM: Use smp_processor_id() in vfp_pm_suspend instead of ti->cpu Keith Packard
2021-09-07 22:00 ` [PATCH 4/7] ARM: Use hack from powerpc to get current cpu number Keith Packard
2021-09-08 7:45 ` Ard Biesheuvel
2021-09-07 22:00 ` [PATCH 5/7] ARM: Stop using TPIDRPRW to hold per_cpu_offset Keith Packard
2021-09-09 13:54 ` Ard Biesheuvel
2021-09-07 22:00 ` Keith Packard [this message]
2021-09-09 13:56 ` [PATCH 6/7] ARM: Use TPIDRPRW for current Ard Biesheuvel
2021-09-07 22:00 ` [PATCH 7/7] ARM: Move thread_info into task_struct (v7 only) Keith Packard
2021-09-08 7:01 ` [PATCH 0/7] ARM: support THREAD_INFO_IN_TASK (v3) Krzysztof Kozlowski
2021-09-08 7:47 ` Ard Biesheuvel
2021-09-08 7:50 ` Geert Uytterhoeven
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210907220038.91021-7-keithpac@amazon.com \
--to=keithpac@amazon.com \
--cc=akpm@linux-foundation.org \
--cc=anshuman.khandual@arm.com \
--cc=ardb@kernel.org \
--cc=arnd@arndb.de \
--cc=axboe@kernel.dk \
--cc=bjorn.andersson@linaro.org \
--cc=cl@linux.com \
--cc=dennis@kernel.org \
--cc=geert+renesas@glider.be \
--cc=joe@perches.com \
--cc=keescook@chromium.org \
--cc=krzysztof.kozlowski@canonical.com \
--cc=linus.walleij@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mm@kvack.org \
--cc=linux@armlinux.org.uk \
--cc=liuwenliang@huawei.com \
--cc=mani@kernel.org \
--cc=masahiroy@kernel.org \
--cc=maz@kernel.org \
--cc=nathan@kernel.org \
--cc=ndesaulniers@google.com \
--cc=ndesaulniers@gooogle.com \
--cc=nico@fluxnic.net \
--cc=rppt@kernel.org \
--cc=ryabinin.a.a@gmail.com \
--cc=tglx@linutronix.de \
--cc=tj@kernel.org \
--cc=u.kleine-koenig@pengutronix.de \
--cc=valentin.schneider@arm.com \
--cc=viresh.kumar@linaro.org \
--cc=wsa+renesas@sang-engineering.com \
--cc=yifeifz2@illinois.edu \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).