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Tue, 7 Sep 2021 21:47:24 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2308.14 via Frontend Transport; Tue, 7 Sep 2021 21:47:24 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 1882lOoE069693; Tue, 7 Sep 2021 21:47:24 -0500 Date: Tue, 7 Sep 2021 21:47:24 -0500 From: Nishanth Menon To: Jan Kiszka CC: Aswath Govindraju , Tero Kristo , Rob Herring , , , , Bao Cheng Su , Chao Zeng Subject: Re: [PATCH 1/3] arm64: dts: ti: iot2050: Flip mmc device ordering on Advanced devices Message-ID: <20210908024724.v76ff5xjlqaddww6@attendant> References: <8e2e435ef67868cb98382b44c51ddb5c8d045d66.1631024536.git.jan.kiszka@siemens.com> <20210907151301.7fqwmc7hmcyhhybv@carve> <35e0cadf-526c-6402-fb8e-8cdb8b7a0bfe@siemens.com> <20210907152746.fbddtkktvx6hb5ti@cattishly> <20210907153547.53cc2zx23rx72kqf@thyself> <482dddc1-b1f8-15db-a0c5-0d6def5d859f@ti.com> <20210907165316.4s3jrouctcpc3kvo@pessimism> <4cb6e76e-479f-5e06-778a-4788be53afb9@siemens.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <4cb6e76e-479f-5e06-778a-4788be53afb9@siemens.com> User-Agent: NeoMutt/20171215 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210907_194726_623109_F1DAB8E0 X-CRM114-Status: GOOD ( 13.91 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 22:28-20210907, Jan Kiszka wrote: [...] > > Yes, I am suggesting a flip in the order and this order can be applied > > across all the K3 SoC's > > > > I'm not sure what you are suggesting. I've sent v2 already which moves > aliasing to SoC level, and I would push that to U-Boot as well if > acceptable. If not, we will keep this in our board DTs. > responded in context of v2: https://lore.kernel.org/all/20210908024442.jskmqqye432p4nmt@gatherer/ -- Regards, Nishanth Menon Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel