From: Chun-Jie Chen <chun-jie.chen@mediatek.com>
To: Matthias Brugger <matthias.bgg@gmail.com>,
Stephen Boyd <sboyd@kernel.org>,
Nicolas Boichat <drinkcat@chromium.org>,
Rob Herring <robh+dt@kernel.org>
Cc: <linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>,
<linux-mediatek@lists.infradead.org>, <linux-clk@vger.kernel.org>,
<devicetree@vger.kernel.org>, <srv_heupstream@mediatek.com>,
<Project_Global_Chrome_Upstream_Group@mediatek.com>,
Chun-Jie Chen <chun-jie.chen@mediatek.com>
Subject: [v3 04/24] clk: mediatek: Add API for clock resource recycle
Date: Tue, 14 Sep 2021 10:16:13 +0800 [thread overview]
Message-ID: <20210914021633.26377-5-chun-jie.chen@mediatek.com> (raw)
In-Reply-To: <20210914021633.26377-1-chun-jie.chen@mediatek.com>
In order to avoid resource leak when fail clock registration appears,
so adds the common interface to handle it.
Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
---
drivers/clk/mediatek/clk-mtk.c | 9 +++++++++
drivers/clk/mediatek/clk-mtk.h | 1 +
2 files changed, 10 insertions(+)
diff --git a/drivers/clk/mediatek/clk-mtk.c b/drivers/clk/mediatek/clk-mtk.c
index 4b6096c44d74..c3d385c0cfcb 100644
--- a/drivers/clk/mediatek/clk-mtk.c
+++ b/drivers/clk/mediatek/clk-mtk.c
@@ -43,6 +43,15 @@ struct clk_onecell_data *mtk_alloc_clk_data(unsigned int clk_num)
return NULL;
}
+void mtk_free_clk_data(struct clk_onecell_data *clk_data)
+{
+ if (!clk_data)
+ return;
+
+ kfree(clk_data->clks);
+ kfree(clk_data);
+}
+
void mtk_clk_register_fixed_clks(const struct mtk_fixed_clk *clks,
int num, struct clk_onecell_data *clk_data)
{
diff --git a/drivers/clk/mediatek/clk-mtk.h b/drivers/clk/mediatek/clk-mtk.h
index 7de41c3b3206..0ff289d93452 100644
--- a/drivers/clk/mediatek/clk-mtk.h
+++ b/drivers/clk/mediatek/clk-mtk.h
@@ -202,6 +202,7 @@ void mtk_clk_register_dividers(const struct mtk_clk_divider *mcds,
struct clk_onecell_data *clk_data);
struct clk_onecell_data *mtk_alloc_clk_data(unsigned int clk_num);
+void mtk_free_clk_data(struct clk_onecell_data *clk_data);
#define HAVE_RST_BAR BIT(0)
#define PLL_AO BIT(1)
--
2.18.0
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next prev parent reply other threads:[~2021-09-14 2:32 UTC|newest]
Thread overview: 55+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-14 2:16 [v3 00/24] Mediatek MT8195 clock support Chun-Jie Chen
2021-09-14 2:16 ` [v3 01/24] dt-bindings: ARM: Mediatek: Add new document bindings of MT8195 clock Chun-Jie Chen
2021-09-14 22:17 ` Stephen Boyd
2021-09-14 2:16 ` [v3 02/24] clk: mediatek: Add dt-bindings of MT8195 clocks Chun-Jie Chen
2021-09-14 22:17 ` Stephen Boyd
2021-09-14 2:16 ` [v3 03/24] clk: mediatek: Fix corner case of tuner_en_reg Chun-Jie Chen
2021-09-14 22:18 ` Stephen Boyd
2021-09-14 2:16 ` Chun-Jie Chen [this message]
2021-09-14 22:18 ` [v3 04/24] clk: mediatek: Add API for clock resource recycle Stephen Boyd
2021-09-14 2:16 ` [v3 05/24] clk: mediatek: Fix resource leak in mtk_clk_simple_probe Chun-Jie Chen
2021-09-14 22:18 ` Stephen Boyd
2021-09-14 2:16 ` [v3 06/24] clk: mediatek: Add MT8195 apmixedsys clock support Chun-Jie Chen
2021-09-14 22:18 ` Stephen Boyd
2021-09-14 2:16 ` [v3 07/24] clk: mediatek: Add MT8195 topckgen " Chun-Jie Chen
2021-09-14 3:54 ` Chen-Yu Tsai
2021-09-14 22:18 ` Stephen Boyd
2021-09-14 2:16 ` [v3 08/24] clk: mediatek: Add MT8195 peripheral " Chun-Jie Chen
2021-09-14 22:18 ` Stephen Boyd
2021-09-14 2:16 ` [v3 09/24] clk: mediatek: Add MT8195 infrastructure " Chun-Jie Chen
2021-09-14 3:57 ` Chen-Yu Tsai
2021-09-14 22:18 ` Stephen Boyd
2021-09-14 2:16 ` [v3 10/24] clk: mediatek: Add MT8195 camsys " Chun-Jie Chen
2021-09-14 22:18 ` Stephen Boyd
2021-09-14 2:16 ` [v3 11/24] clk: mediatek: Add MT8195 ccusys " Chun-Jie Chen
2021-09-14 22:18 ` Stephen Boyd
2021-09-14 2:16 ` [v3 12/24] clk: mediatek: Add MT8195 imgsys " Chun-Jie Chen
2021-09-14 22:19 ` Stephen Boyd
2021-09-14 2:16 ` [v3 13/24] clk: mediatek: Add MT8195 ipesys " Chun-Jie Chen
2021-09-14 3:58 ` Chen-Yu Tsai
2021-09-14 22:19 ` Stephen Boyd
2021-09-14 2:16 ` [v3 14/24] clk: mediatek: Add MT8195 mfgcfg " Chun-Jie Chen
2021-09-14 3:59 ` Chen-Yu Tsai
2021-09-14 22:19 ` Stephen Boyd
2021-09-14 2:16 ` [v3 15/24] clk: mediatek: Add MT8195 scp adsp " Chun-Jie Chen
2021-09-14 22:19 ` Stephen Boyd
2021-09-14 2:16 ` [v3 16/24] clk: mediatek: Add MT8195 vdecsys " Chun-Jie Chen
2021-09-14 22:19 ` Stephen Boyd
2021-09-14 2:16 ` [v3 17/24] clk: mediatek: Add MT8195 vdosys0 " Chun-Jie Chen
2021-09-14 4:00 ` Chen-Yu Tsai
2021-09-14 22:19 ` Stephen Boyd
2021-09-14 2:16 ` [v3 18/24] clk: mediatek: Add MT8195 vdosys1 " Chun-Jie Chen
2021-09-14 4:00 ` Chen-Yu Tsai
2021-09-14 22:19 ` Stephen Boyd
2021-09-14 2:16 ` [v3 19/24] clk: mediatek: Add MT8195 vencsys " Chun-Jie Chen
2021-09-14 22:19 ` Stephen Boyd
2021-09-14 2:16 ` [v3 20/24] clk: mediatek: Add MT8195 vppsys0 " Chun-Jie Chen
2021-09-14 22:19 ` Stephen Boyd
2021-09-14 2:16 ` [v3 21/24] clk: mediatek: Add MT8195 vppsys1 " Chun-Jie Chen
2021-09-14 22:19 ` Stephen Boyd
2021-09-14 2:16 ` [v3 22/24] clk: mediatek: Add MT8195 wpesys " Chun-Jie Chen
2021-09-14 22:20 ` Stephen Boyd
2021-09-14 2:16 ` [v3 23/24] clk: mediatek: Add MT8195 imp i2c wrapper " Chun-Jie Chen
2021-09-14 22:20 ` Stephen Boyd
2021-09-14 2:16 ` [v3 24/24] clk: mediatek: Add MT8195 apusys " Chun-Jie Chen
2021-09-14 22:20 ` Stephen Boyd
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