Re: [PATCH v3 08/10] coresight: trbe: Unify the enabling sequence

From: Mathieu Poirier <mathieu.poirier@linaro.org>
To: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org,
	anshuman.khandual@arm.com, mike.leach@linaro.org,
	leo.yan@linaro.org, tamas.zsoldos@arm.com,
	jinlmao@qti.qualcomm.com, al.grant@arm.com, denik@google.com
Subject: Re: [PATCH v3 08/10] coresight: trbe: Unify the enabling sequence
Date: Wed, 22 Sep 2021 10:56:10 -0600	[thread overview]
Message-ID: <20210922165610.GC2129167@p14s> (raw)
In-Reply-To: <20210914102641.1852544-9-suzuki.poulose@arm.com>

On Tue, Sep 14, 2021 at 11:26:39AM +0100, Suzuki K Poulose wrote:
> Unify the sequence of enabling the TRBE. We do this from
> event_start and also from the TRBE IRQ handler. Lets move
> this to a common helper. The only minor functional change
> is returning an error when we fail to enable the TRBE.
> This should be handled already.
> 
> Since we now have unique entry point to trying to enable TRBE,
> move the format flag setting to the central place.
> 
> Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
> Cc: Mike Leach <mike.leach@linaro.org>
> Cc: Leo Yan <leo.yan@linaro.org>
> Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
> ---
> Changes since v2:
>  - Removed redundant handle book keeping (Anshuman)
>  - Moved the format flag setting to the helper
> ---
>  drivers/hwtracing/coresight/coresight-trbe.c | 37 ++++++++++----------
>  1 file changed, 18 insertions(+), 19 deletions(-)
>

Applied.

> diff --git a/drivers/hwtracing/coresight/coresight-trbe.c b/drivers/hwtracing/coresight/coresight-trbe.c
> index a1a15fa6c4ae..25c16d0f9e49 100644
> --- a/drivers/hwtracing/coresight/coresight-trbe.c
> +++ b/drivers/hwtracing/coresight/coresight-trbe.c
> @@ -629,6 +629,21 @@ static unsigned long arm_trbe_update_buffer(struct coresight_device *csdev,
>  	return size;
>  }
>  
> +static int __arm_trbe_enable(struct trbe_buf *buf,
> +			     struct perf_output_handle *handle)
> +{
> +	perf_aux_output_flag(handle, PERF_AUX_FLAG_CORESIGHT_FORMAT_RAW);
> +	buf->trbe_limit = compute_trbe_buffer_limit(handle);
> +	buf->trbe_write = buf->trbe_base + PERF_IDX2OFF(handle->head, buf);
> +	if (buf->trbe_limit == buf->trbe_base) {
> +		trbe_stop_and_truncate_event(handle);
> +		return -ENOSPC;
> +	}
> +	*this_cpu_ptr(buf->cpudata->drvdata->handle) = handle;
> +	trbe_enable_hw(buf);
> +	return 0;
> +}
> +
>  static int arm_trbe_enable(struct coresight_device *csdev, u32 mode, void *data)
>  {
>  	struct trbe_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
> @@ -641,19 +656,11 @@ static int arm_trbe_enable(struct coresight_device *csdev, u32 mode, void *data)
>  	if (mode != CS_MODE_PERF)
>  		return -EINVAL;
>  
> -	perf_aux_output_flag(handle, PERF_AUX_FLAG_CORESIGHT_FORMAT_RAW);
> -	*this_cpu_ptr(drvdata->handle) = handle;
>  	cpudata->buf = buf;
>  	cpudata->mode = mode;
>  	buf->cpudata = cpudata;
> -	buf->trbe_limit = compute_trbe_buffer_limit(handle);
> -	buf->trbe_write = buf->trbe_base + PERF_IDX2OFF(handle->head, buf);
> -	if (buf->trbe_limit == buf->trbe_base) {
> -		trbe_stop_and_truncate_event(handle);
> -		return 0;
> -	}
> -	trbe_enable_hw(buf);
> -	return 0;
> +
> +	return __arm_trbe_enable(buf, handle);
>  }
>  
>  static int arm_trbe_disable(struct coresight_device *csdev)
> @@ -719,15 +726,7 @@ static void trbe_handle_overflow(struct perf_output_handle *handle)
>  		*this_cpu_ptr(buf->cpudata->drvdata->handle) = NULL;
>  		return;
>  	}
> -	perf_aux_output_flag(handle, PERF_AUX_FLAG_CORESIGHT_FORMAT_RAW);
> -	buf->trbe_limit = compute_trbe_buffer_limit(handle);
> -	buf->trbe_write = buf->trbe_base + PERF_IDX2OFF(handle->head, buf);
> -	if (buf->trbe_limit == buf->trbe_base) {
> -		trbe_stop_and_truncate_event(handle);
> -		return;
> -	}
> -	*this_cpu_ptr(buf->cpudata->drvdata->handle) = handle;
> -	trbe_enable_hw(buf);
> +	__arm_trbe_enable(buf, handle);
>  }
>  
>  static bool is_perf_trbe(struct perf_output_handle *handle)
> -- 
> 2.24.1
> 

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