From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2E774C433F5 for ; Mon, 4 Oct 2021 07:57:27 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E3FAD60F38 for ; Mon, 4 Oct 2021 07:57:26 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org E3FAD60F38 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=1/SRBW9ZC+KxNHrxlp7tKfx3Wv9azs3iqa3Wcf/Wyik=; b=KtxoYwpsNs6dd0 YeMGCCPSvjbOFsb4w2qtXgbZE2WPrjyCK0RayqOye7HETZxx1OQA+jY1O1lR/Oo/3eXFZ6SH//glI IZRTBoA8PHCKQfyva8tKrCCzq3nc5EHf3yCd3U1ZlA9YhRtj2d8Twwx0KS3rkZW19cyHzNhgtdcpX 7s6MYV0yJhZmmG2R/O5ekebWGeA5I8vBf7iG6mAWfTkvXbYmfTMUHpzyQsu8ViznocOmSAi5PdJc2 dYwT9NLM9BNG+fDfaYo3wiOAfYn361S9t7ardFcy3UZEx8XOgSGrbhWZtQNBbOUBuEuwFAvoro0fH 2g2H/7oN+J7pH5bk8yAA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mXIny-005Xlj-T8; Mon, 04 Oct 2021 07:54:35 +0000 Received: from mail.kernel.org ([198.145.29.99]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mXInv-005Xl4-C9 for linux-arm-kernel@lists.infradead.org; Mon, 04 Oct 2021 07:54:32 +0000 Received: by mail.kernel.org (Postfix) with ESMTPSA id B672061354; Mon, 4 Oct 2021 07:54:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1633334070; bh=6PIsL6p5IPhnXy9iixyqEjUrOGpiSs/yc5qO2qmd0/A=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=S0SA7Kubf1HUCHPPwtXHAUxc+dw4VHVHR/3iOrqI3O0CN5tK2UfklE7OQP2MRKPPa TcaRytaETD7p43fNyA3qjWqOwaTb+mKd6389TZn2/a7PXGzHYqiQy8M6sbjQ2XF6Yj sabR/+v1VllYO4JkASD86fxvzwZKxFLD3wJmGj3gVXsaHhhSih5w/X6ZIJn2a77S3M clWV8n97zkWjRt7DoGvgZoohjEPdvE3WSqJALaOMGWxyx9aAcZWBuUkwleOQyumcRO edmFXXjk6LKnQh35ocPkSUZ7bcCsINIicB4/rNEqazQ24+BN3vuqiMJe7drAkfB+pn nWzipc9JIVGmg== Date: Mon, 4 Oct 2021 15:54:25 +0800 From: Shawn Guo To: Marek Vasut Cc: linux-arm-kernel@lists.infradead.org, Peng Fan , Frieder Schrempf , Lucas Stach , NXP Linux Team Subject: Re: [PATCH v3 1/2] soc: imx: gpcv2: Turn domain->pgc into bitfield Message-ID: <20211004075425.GE15650@dragon> References: <20210907023830.871164-1-marex@denx.de> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20210907023830.871164-1-marex@denx.de> User-Agent: Mutt/1.9.4 (2018-02-28) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211004_005431_457552_C7FFA279 X-CRM114-Status: GOOD ( 12.36 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, Sep 07, 2021 at 04:38:29AM +0200, Marek Vasut wrote: > There is currently the MX8MM GPU domain, which is in fact a composite domain > for both GPU2D and GPU3D. To correctly configure this domain, it is necessary > to control both GPC_PGC_nCTRL(GPU_2D) and GPC_PGC_nCTRL(GPU_3D) at the same > time. This is currently not possible. > > Turn the domain->pgc from value into bitfield and use for_each_set_bit() to > iterate over all bits set in domain->pgc when configuring GPC_PGC_nCTRL > register array. This way it is possible to configure all GPC_PGC_nCTRL > registers required in a particular domain. > > This is a preparatory patch, no functional change. > > Reviewed-by: Peng Fan > Signed-off-by: Marek Vasut > Cc: Frieder Schrempf > Cc: Lucas Stach > Cc: NXP Linux Team > Cc: Peng Fan > Cc: Shawn Guo Applied both, thanks! _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel