From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 21486C433EF for ; Fri, 8 Oct 2021 08:03:02 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D866860FE8 for ; Fri, 8 Oct 2021 08:03:01 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org D866860FE8 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=UdW1Bgh9fx1Xk9kyg041uUkjCKGN0/7w8axCMmJtvhU=; b=pTctgR2dJECluI jeTBKYQ+OTN7o7cg3t7tt2GiwJY4q9wsUCnkx4t1voVmN2erDy6gFt5tTmKD1LkCfYesEKuyzgf0U b4t+8lwlo4FLc9rdJ+waMNkhaw5xi1wZ9PGCKrK1zgdfxvcl2MATY7NZ3uvjmTJdXiTxSjEUpVLzM ueBgk6I5dTCNnK+f4CU040ILR8WX0BRvCA3uS3kseU+/k+JJnuw9peodh1lkgCiUAKJ6z6gAjYVEq 0Q0wT84Oa+Z6quertrBygnek+6JmYSCL12CQ2rvBuwLx6mGDWGK3vMMm1UkdpdNyA+1tYcbOigxVX NWjWDrhHMjI0cOzm+GTQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mYkom-001yL7-QY; Fri, 08 Oct 2021 08:01:24 +0000 Received: from mail.kernel.org ([198.145.29.99]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mYkoj-001yKS-1n for linux-arm-kernel@lists.infradead.org; Fri, 08 Oct 2021 08:01:22 +0000 Received: by mail.kernel.org (Postfix) with ESMTPSA id DB10661037; Fri, 8 Oct 2021 08:01:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1633680080; bh=jBP5YiJelY1gFHbkIeJVER6Kc4RrNqrmg0M9IIt5CTE=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=bLEf2Qd3vCQd0wunvozQAOcFzTgr5ptD+soEtOINt59Vqj2rMFe6LV6JiHTWbCtve 8juOuaYIzuEwFyla0xtdk0D6BAXpxZG4r7ekbBeZ5N/R3rmkRsVzvfGx0UbsvSb6F4 B2RFw27JfS6boYJEofuBqUAzsmsbP40ciYauPfZtgpQ65UDCyh2hrMYjFb7ZKCWgCS wd4+hkSxIaKiOIK7OIeFh8cfo/UMyiwmkLp5rnZIABeKLUxQXLTTnAq/l4M1guFFYa iYR48lRMOz3NeUiW1sbYo6+9nTt6Q70t+rFlMWuOV+9rzU8oRaQ2cJzqIGO+YfD9RH 36JZyDm3sVHTw== Date: Fri, 8 Oct 2021 09:01:15 +0100 From: Will Deacon To: Huangzhaoyang Cc: Catalin Marinas , Mark Rutland , Suzuki K Poulose , Ionela Voinescu , Quentin Perret , Vladimir Murzin , linux-arm-kernel@lists.infradead.org, Zhaoyang Huang , linux-kernel@vger.kernel.org, ke.wang@unisoc.com Subject: Re: [RFC PATCH] arch: ARM64: add isb before enable pan Message-ID: <20211008080113.GA441@willie-the-truck> References: <1633673269-15048-1-git-send-email-huangzhaoyang@gmail.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1633673269-15048-1-git-send-email-huangzhaoyang@gmail.com> User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211008_010121_136543_624455D7 X-CRM114-Status: GOOD ( 18.48 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi, On Fri, Oct 08, 2021 at 02:07:49PM +0800, Huangzhaoyang wrote: > From: Zhaoyang Huang > > set_pstate_pan failure is observed in an ARM64 system occasionaly on a reboot > test, which can be work around by a msleep on the sw context. We assume > suspicious on disorder of previous instr of disabling SW_PAN and add an isb here. > > PS: > The bootup test failed with a invalid TTBR1_EL1 that equals 0x34000000, which is > alike racing between on chip PAN and SW_PAN. Sorry, but I'm struggling to understand the problem here. Please could you explain it in more detail? - Why does a TTBR1_EL1 value of `0x34000000` indicate a race? - Can you explain the race that you think might be occurring? - Why does an ISB prevent the race? > Signed-off-by: Zhaoyang Huang > --- > arch/arm64/kernel/cpufeature.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c > index efed283..3c0de0d 100644 > --- a/arch/arm64/kernel/cpufeature.c > +++ b/arch/arm64/kernel/cpufeature.c > @@ -1663,6 +1663,7 @@ static void cpu_enable_pan(const struct arm64_cpu_capabilities *__unused) > WARN_ON_ONCE(in_interrupt()); > > sysreg_clear_set(sctlr_el1, SCTLR_EL1_SPAN, 0); > + isb(); > set_pstate_pan(1); SCTLR_EL1.SPAN only affects the PAN behaviour on taking an exception, which is itself a context-synchronizing event, so I can't see why the ISB makes any difference here (at least, for the purposes of PAN). Thanks, Will _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel