From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B4185C433EF for ; Wed, 13 Oct 2021 19:05:06 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7D45E610F9 for ; Wed, 13 Oct 2021 19:05:06 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 7D45E610F9 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Message-ID: Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:References: List-Owner; bh=ok4OFIxGf/YmujTwh3GHHl1/Gyf6qhzxzk+vNXusPKw=; b=twCaTZlIH2C5dQ aggVZ4IF2SelE+hq2xCx95FnH4I9eBsYK50nKginubqjLaCQ25VoVM0KCqaTK+nl/1znm21LcUF6r hZ7XPAeZfx6tpwTii3nYxSJzS7cwAnMdFILuYR+f0BFr5P1X5FclKm02JudV5/CXWthrt5sYcT0Xp QWM6W1InyRnJ1v9xP1wCCRAQO5HmlFSQA0Gj5rh9UG7kaRlhtEf8SHCtA/OQJb7Sy6Gflcr9vOL5E 7mHLNXL5IhhWjHppasMO/xeyh8PUN/lBwRgS5SHuouGPUUH6YQ4KTvo0RZ3V/b8m1IbObakO2Aykk f2OZpU299D5L1j4qL/lA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1majWK-000OKM-Eb; Wed, 13 Oct 2021 19:02:32 +0000 Received: from mail.kernel.org ([198.145.29.99]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1majWH-000OJh-9J; Wed, 13 Oct 2021 19:02:30 +0000 Received: by mail.kernel.org (Postfix) with ESMTPSA id 6284060E96; Wed, 13 Oct 2021 19:02:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1634151749; bh=nrpmV2aL7Yyo2rvXkWXL6W7OTMDFqb0qTu+6E6wA2jw=; h=Date:From:To:Cc:Subject:In-Reply-To:From; b=SOy4uik6jEZWbxmPABrbRogV42T8n5r6jEXXfPGNkk6SIgKDyIO6cbZHoarlAkULH kjFBy8PONij7Kl/a60F5hUAIVGNFG9k12KIb2imfqAi2rJcNiU8z+4/0Pb3gpVh9NV ZE3BZ4ySVphSPjAHTDam/ZsH5e6jxU/R6OI0hHiCymtbcuanXohqSbDNMLVzpcPMG4 +ZwTDIG4PZnBHVWK/y0yyxATl1P2Qxh2c1shr3aCXxIkGCWdlLx0vEnrb+FK0vCgIV liF96uxIaP05sMPqKAeIkyXUSC0pKpdUh2TTdPkiCAvJs5qPoCYm3v145cEdkU6kNk 2BB+INXZ2Oo4Q== Date: Wed, 13 Oct 2021 14:02:26 -0500 From: Bjorn Helgaas To: Jianjun Wang Cc: Lorenzo Pieralisi , Rob Herring , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Bjorn Helgaas , Ryder Lee , Matthias Brugger , linux-pci@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, qizhong.cheng@mediatek.com, Ryan-JH.Yu@mediatek.com, Tzung-Bi Shih Subject: Re: [PATCH v2] PCI: mediatek-gen3: Disable DVFSRC voltage request Message-ID: <20211013190226.GA1910352@bhelgaas> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20211013183515.GA1907868@bhelgaas> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211013_120229_379885_BC2DF4E4 X-CRM114-Status: GOOD ( 26.73 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Oct 13, 2021 at 01:35:17PM -0500, Bjorn Helgaas wrote: > On Wed, Oct 13, 2021 at 03:53:28PM +0800, Jianjun Wang wrote: > > When the DVFSRC feature is not implemented, the MAC layer will > > assert a voltage request signal when exit from the L1ss state, > > but cannot receive the voltage ready signal, which will cause > > the link to fail to exit the L1ss state correctly. > > > > Disable DVFSRC voltage request by default, we need to find > > a common way to enable it in the future. > > Rewrap commit log to fill 75 columns. > > Does "L1ss" above refer to L1.1 and L1.2? If so, please say that > explicitly or say something like "L1 PM Substates" (the term used in > the PCIe spec) so it's clear. > > This seems on the boundary of PCIe-specified things and Mediatek > implementation details, so I'm not sure what "DVFSRC," "MAC," and > "voltage request signal" mean. Since I don't recognize those terms, > I'm guessing they are Mediatek-specific things. > > But if they are things specified by the PCIe spec, please use the > exact names used in the spec. > > > Signed-off-by: Jianjun Wang > > Reviewed-by: Tzung-Bi Shih > > Tested-by: Qizhong Cheng Krzysztof also pointed out that if this is a bug fix, we may want a stable tag here. And, ideally, a Fixes: tag with the specific commit that introduced the bug. > > --- > > drivers/pci/controller/pcie-mediatek-gen3.c | 8 ++++++++ > > 1 file changed, 8 insertions(+) > > > > diff --git a/drivers/pci/controller/pcie-mediatek-gen3.c b/drivers/pci/controller/pcie-mediatek-gen3.c > > index f3aeb8d4eaca..79fb12fca6a9 100644 > > --- a/drivers/pci/controller/pcie-mediatek-gen3.c > > +++ b/drivers/pci/controller/pcie-mediatek-gen3.c > > @@ -79,6 +79,9 @@ > > #define PCIE_ICMD_PM_REG 0x198 > > #define PCIE_TURN_OFF_LINK BIT(4) > > > > +#define PCIE_MISC_CTRL_REG 0x348 > > +#define PCIE_DISABLE_DVFSRC_VLT_REQ BIT(1) > > + > > #define PCIE_TRANS_TABLE_BASE_REG 0x800 > > #define PCIE_ATR_SRC_ADDR_MSB_OFFSET 0x4 > > #define PCIE_ATR_TRSL_ADDR_LSB_OFFSET 0x8 > > @@ -297,6 +300,11 @@ static int mtk_pcie_startup_port(struct mtk_pcie_port *port) > > val &= ~PCIE_INTX_ENABLE; > > writel_relaxed(val, port->base + PCIE_INT_ENABLE_REG); > > > > + /* Disable DVFSRC voltage request */ > > + val = readl_relaxed(port->base + PCIE_MISC_CTRL_REG); > > + val |= PCIE_DISABLE_DVFSRC_VLT_REQ; > > + writel_relaxed(val, port->base + PCIE_MISC_CTRL_REG); > > + > > /* Assert all reset signals */ > > val = readl_relaxed(port->base + PCIE_RST_CTRL_REG); > > val |= PCIE_MAC_RSTB | PCIE_PHY_RSTB | PCIE_BRG_RSTB | PCIE_PE_RSTB; > > -- > > 2.25.1 > > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel