From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1D20CC433F5 for ; Thu, 14 Oct 2021 09:06:27 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D729C60F11 for ; Thu, 14 Oct 2021 09:06:26 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org D729C60F11 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=zYJiSydc2CrLOUcwpUQZnoWWlCa3v30Uw7irDcqAQo8=; b=nMfmYfqoVXQyfk fOl93zNrSzBud6m0MYItW2YmOYvAso6nyeflvjzBa5Vys+916lRj/xM3Ivp6QLj2vIibzGTCIWv8m kkqUg3QYBb8zdeKQ7adWobabPr0x9XGDtHAcwCkAYysC8mHjxe6kOLD90k9yU01GSbD9y0QKPnxz1 vK8lXMB0CQbdBPsI4gcb+cfxhIsNq1zctE3CAqfUDBY931jsprYTeHv0sH3VUdmy3Mu9JfZ6XSma0 aOjC6uuVOqUCVk4R9E7XwruM+Vc+cSQi6mK1CeGtwsKnYvojAfBbX3DnZKVSk0DAOGueeQW+Vf71V +QdgETUtjxMP7cNFOqXw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mawf1-002IW7-1f; Thu, 14 Oct 2021 09:04:23 +0000 Received: from us-smtp-delivery-124.mimecast.com ([216.205.24.124]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mawex-002IUO-J6 for linux-arm-kernel@lists.infradead.org; Thu, 14 Oct 2021 09:04:21 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1634202256; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=ArdfMWNbuG02n1OQKPEk6jS02d/uCbdT+PSDgFpbJqI=; b=PnKbrHFCe5oJP0MoegCR/l+Agbzcv7SlMVLHjkkQIiNrhuLWzMOoCvYQhaJ3/3WLnJ0K4c X0L+SgZIJfdF9++/XnVEte3mOqT+MXS085CW0vMXs2Is5xv90jnqQLkHgt/3CD/gRxvHOf E5TpjDrbBD7ImRkoJ0eguknk21O+nQU= Received: from mail-ed1-f72.google.com (mail-ed1-f72.google.com [209.85.208.72]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-477-giE2S5n7PceIPrCKmTeULw-1; Thu, 14 Oct 2021 05:04:15 -0400 X-MC-Unique: giE2S5n7PceIPrCKmTeULw-1 Received: by mail-ed1-f72.google.com with SMTP id l10-20020a056402230a00b003db6977b694so4558895eda.23 for ; Thu, 14 Oct 2021 02:04:15 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=ArdfMWNbuG02n1OQKPEk6jS02d/uCbdT+PSDgFpbJqI=; b=tbpoYOdBQHT6LmcW1M5ZIdIeY7GG9qhRfPndAh49BXcbzoN0usnl9R+YAFGzW03uPF qXKY4Wcr2bVsYgjU8pbzPrZgcTFpSLFWfpjznjbHmnfWGSo6r5T8dUWvlmEyMW4kOjZK zF3zWYvH0qDJ7EaQNi6UReQjStnTvDRSPdeWnd/ON+pkvvafN1sK/GVuuxDE/kFhM/as KGn2XuIszCfEr4+dPylqsPUO/wGfKjrGrDKc/RXL/gtmSMakRBS+oIZ51hubjrdAIe5j yhvWrg2jkUYnp/DbImHGIaNtz/4a0wPXB+od1vQlBIWGDRMopX9jedT02oEQtjHaWl1/ xCRQ== X-Gm-Message-State: AOAM532Iwuqff6tUmI7ThU2GfvkUNgARmSx7CNv21p/FzEZy+flSUUUR 0+S+Dh7ogRFugIPTIlBBfAQxZ4YG9y6lKktrmxBsgTvRJvssTDIRcPUhCYpQU78DUsGlBj+aIo7 CMVhL9fPt98ChiF7B/tetJaLxCAE9w10UZSo= X-Received: by 2002:a17:906:480a:: with SMTP id w10mr2449891ejq.262.1634202254384; Thu, 14 Oct 2021 02:04:14 -0700 (PDT) X-Google-Smtp-Source: ABdhPJx51QMjFB9Vzo1OSOWMnnTw0zDmc+1WIxFwXo1jS+FtYBu1RisLoBxSR9VmCwx+bPBhBVyTMQ== X-Received: by 2002:a17:906:480a:: with SMTP id w10mr2449861ejq.262.1634202254160; Thu, 14 Oct 2021 02:04:14 -0700 (PDT) Received: from gator.home (cst2-174-28.cust.vodafone.cz. [31.30.174.28]) by smtp.gmail.com with ESMTPSA id ke12sm1431541ejc.32.2021.10.14.02.04.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 Oct 2021 02:04:13 -0700 (PDT) Date: Thu, 14 Oct 2021 11:04:11 +0200 From: Andrew Jones To: Marc Zyngier Cc: kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, will@kernel.org, james.morse@arm.com, alexandru.elisei@arm.com, suzuki.poulose@arm.com, mark.rutland@arm.com, pbonzini@redhat.com, oupton@google.com, qperret@google.com, kernel-team@android.com, tabba@google.com Subject: Re: [PATCH v9 13/22] KVM: arm64: pkvm: Use a single function to expose all id-regs Message-ID: <20211014090411.dk2whm76hwsems6j@gator.home> References: <20211010145636.1950948-12-tabba@google.com> <20211013120346.2926621-1-maz@kernel.org> <20211013120346.2926621-3-maz@kernel.org> MIME-Version: 1.0 In-Reply-To: <20211013120346.2926621-3-maz@kernel.org> Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=drjones@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Disposition: inline X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211014_020419_755095_23907A0C X-CRM114-Status: GOOD ( 23.59 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Oct 13, 2021 at 01:03:37PM +0100, Marc Zyngier wrote: > Rather than exposing a whole set of helper functions to retrieve > individual ID registers, use the existing decoding tree and expose > a single helper instead. > > This allow a number of functions to be made static, and we now > have a single entry point to maintain. > > Signed-off-by: Marc Zyngier > --- > arch/arm64/kvm/hyp/include/nvhe/sys_regs.h | 14 +------- > arch/arm64/kvm/hyp/nvhe/pkvm.c | 10 +++--- > arch/arm64/kvm/hyp/nvhe/sys_regs.c | 37 ++++++++++++---------- > 3 files changed, 26 insertions(+), 35 deletions(-) > > diff --git a/arch/arm64/kvm/hyp/include/nvhe/sys_regs.h b/arch/arm64/kvm/hyp/include/nvhe/sys_regs.h > index 3288128738aa..8adc13227b1a 100644 > --- a/arch/arm64/kvm/hyp/include/nvhe/sys_regs.h > +++ b/arch/arm64/kvm/hyp/include/nvhe/sys_regs.h > @@ -9,19 +9,7 @@ > > #include > > -u64 get_pvm_id_aa64pfr0(const struct kvm_vcpu *vcpu); > -u64 get_pvm_id_aa64pfr1(const struct kvm_vcpu *vcpu); > -u64 get_pvm_id_aa64zfr0(const struct kvm_vcpu *vcpu); > -u64 get_pvm_id_aa64dfr0(const struct kvm_vcpu *vcpu); > -u64 get_pvm_id_aa64dfr1(const struct kvm_vcpu *vcpu); > -u64 get_pvm_id_aa64afr0(const struct kvm_vcpu *vcpu); > -u64 get_pvm_id_aa64afr1(const struct kvm_vcpu *vcpu); > -u64 get_pvm_id_aa64isar0(const struct kvm_vcpu *vcpu); > -u64 get_pvm_id_aa64isar1(const struct kvm_vcpu *vcpu); > -u64 get_pvm_id_aa64mmfr0(const struct kvm_vcpu *vcpu); > -u64 get_pvm_id_aa64mmfr1(const struct kvm_vcpu *vcpu); > -u64 get_pvm_id_aa64mmfr2(const struct kvm_vcpu *vcpu); This is nice. > - > +u64 pvm_read_id_reg(const struct kvm_vcpu *vcpu, u32 id); > bool kvm_handle_pvm_sysreg(struct kvm_vcpu *vcpu, u64 *exit_code); > int kvm_check_pvm_sysreg_table(void); > void inject_undef64(struct kvm_vcpu *vcpu); > diff --git a/arch/arm64/kvm/hyp/nvhe/pkvm.c b/arch/arm64/kvm/hyp/nvhe/pkvm.c > index 633547cc1033..62377fa8a4cb 100644 > --- a/arch/arm64/kvm/hyp/nvhe/pkvm.c > +++ b/arch/arm64/kvm/hyp/nvhe/pkvm.c > @@ -15,7 +15,7 @@ > */ > static void pvm_init_traps_aa64pfr0(struct kvm_vcpu *vcpu) > { > - const u64 feature_ids = get_pvm_id_aa64pfr0(vcpu); > + const u64 feature_ids = pvm_read_id_reg(vcpu, SYS_ID_AA64PFR0_EL1); > u64 hcr_set = HCR_RW; > u64 hcr_clear = 0; > u64 cptr_set = 0; > @@ -62,7 +62,7 @@ static void pvm_init_traps_aa64pfr0(struct kvm_vcpu *vcpu) > */ > static void pvm_init_traps_aa64pfr1(struct kvm_vcpu *vcpu) > { > - const u64 feature_ids = get_pvm_id_aa64pfr1(vcpu); > + const u64 feature_ids = pvm_read_id_reg(vcpu, SYS_ID_AA64PFR1_EL1); > u64 hcr_set = 0; > u64 hcr_clear = 0; > > @@ -81,7 +81,7 @@ static void pvm_init_traps_aa64pfr1(struct kvm_vcpu *vcpu) > */ > static void pvm_init_traps_aa64dfr0(struct kvm_vcpu *vcpu) > { > - const u64 feature_ids = get_pvm_id_aa64dfr0(vcpu); > + const u64 feature_ids = pvm_read_id_reg(vcpu, SYS_ID_AA64DFR0_EL1); > u64 mdcr_set = 0; > u64 mdcr_clear = 0; > u64 cptr_set = 0; > @@ -125,7 +125,7 @@ static void pvm_init_traps_aa64dfr0(struct kvm_vcpu *vcpu) > */ > static void pvm_init_traps_aa64mmfr0(struct kvm_vcpu *vcpu) > { > - const u64 feature_ids = get_pvm_id_aa64mmfr0(vcpu); > + const u64 feature_ids = pvm_read_id_reg(vcpu, SYS_ID_AA64MMFR0_EL1); > u64 mdcr_set = 0; > > /* Trap Debug Communications Channel registers */ > @@ -140,7 +140,7 @@ static void pvm_init_traps_aa64mmfr0(struct kvm_vcpu *vcpu) > */ > static void pvm_init_traps_aa64mmfr1(struct kvm_vcpu *vcpu) > { > - const u64 feature_ids = get_pvm_id_aa64mmfr1(vcpu); > + const u64 feature_ids = pvm_read_id_reg(vcpu, SYS_ID_AA64MMFR1_EL1); > u64 hcr_set = 0; > > /* Trap LOR */ > diff --git a/arch/arm64/kvm/hyp/nvhe/sys_regs.c b/arch/arm64/kvm/hyp/nvhe/sys_regs.c > index 6bde2dc5205c..f125d6a52880 100644 > --- a/arch/arm64/kvm/hyp/nvhe/sys_regs.c > +++ b/arch/arm64/kvm/hyp/nvhe/sys_regs.c > @@ -82,7 +82,7 @@ static u64 get_restricted_features_unsigned(u64 sys_reg_val, > * based on allowed features, system features, and KVM support. > */ > > -u64 get_pvm_id_aa64pfr0(const struct kvm_vcpu *vcpu) > +static u64 get_pvm_id_aa64pfr0(const struct kvm_vcpu *vcpu) > { > const struct kvm *kvm = (const struct kvm *)kern_hyp_va(vcpu->kvm); > u64 set_mask = 0; > @@ -103,7 +103,7 @@ u64 get_pvm_id_aa64pfr0(const struct kvm_vcpu *vcpu) > return (id_aa64pfr0_el1_sys_val & allow_mask) | set_mask; > } > > -u64 get_pvm_id_aa64pfr1(const struct kvm_vcpu *vcpu) > +static u64 get_pvm_id_aa64pfr1(const struct kvm_vcpu *vcpu) > { > const struct kvm *kvm = (const struct kvm *)kern_hyp_va(vcpu->kvm); > u64 allow_mask = PVM_ID_AA64PFR1_ALLOW; > @@ -114,7 +114,7 @@ u64 get_pvm_id_aa64pfr1(const struct kvm_vcpu *vcpu) > return id_aa64pfr1_el1_sys_val & allow_mask; > } > > -u64 get_pvm_id_aa64zfr0(const struct kvm_vcpu *vcpu) > +static u64 get_pvm_id_aa64zfr0(const struct kvm_vcpu *vcpu) > { > /* > * No support for Scalable Vectors, therefore, hyp has no sanitized > @@ -124,7 +124,7 @@ u64 get_pvm_id_aa64zfr0(const struct kvm_vcpu *vcpu) > return 0; > } > > -u64 get_pvm_id_aa64dfr0(const struct kvm_vcpu *vcpu) > +static u64 get_pvm_id_aa64dfr0(const struct kvm_vcpu *vcpu) > { > /* > * No support for debug, including breakpoints, and watchpoints, > @@ -134,7 +134,7 @@ u64 get_pvm_id_aa64dfr0(const struct kvm_vcpu *vcpu) > return 0; > } > > -u64 get_pvm_id_aa64dfr1(const struct kvm_vcpu *vcpu) > +static u64 get_pvm_id_aa64dfr1(const struct kvm_vcpu *vcpu) > { > /* > * No support for debug, therefore, hyp has no sanitized copy of the > @@ -144,7 +144,7 @@ u64 get_pvm_id_aa64dfr1(const struct kvm_vcpu *vcpu) > return 0; > } > > -u64 get_pvm_id_aa64afr0(const struct kvm_vcpu *vcpu) > +static u64 get_pvm_id_aa64afr0(const struct kvm_vcpu *vcpu) > { > /* > * No support for implementation defined features, therefore, hyp has no > @@ -154,7 +154,7 @@ u64 get_pvm_id_aa64afr0(const struct kvm_vcpu *vcpu) > return 0; > } > > -u64 get_pvm_id_aa64afr1(const struct kvm_vcpu *vcpu) > +static u64 get_pvm_id_aa64afr1(const struct kvm_vcpu *vcpu) > { > /* > * No support for implementation defined features, therefore, hyp has no > @@ -164,12 +164,12 @@ u64 get_pvm_id_aa64afr1(const struct kvm_vcpu *vcpu) > return 0; > } > > -u64 get_pvm_id_aa64isar0(const struct kvm_vcpu *vcpu) > +static u64 get_pvm_id_aa64isar0(const struct kvm_vcpu *vcpu) > { > return id_aa64isar0_el1_sys_val & PVM_ID_AA64ISAR0_ALLOW; > } > > -u64 get_pvm_id_aa64isar1(const struct kvm_vcpu *vcpu) > +static u64 get_pvm_id_aa64isar1(const struct kvm_vcpu *vcpu) > { > u64 allow_mask = PVM_ID_AA64ISAR1_ALLOW; > > @@ -182,7 +182,7 @@ u64 get_pvm_id_aa64isar1(const struct kvm_vcpu *vcpu) > return id_aa64isar1_el1_sys_val & allow_mask; > } > > -u64 get_pvm_id_aa64mmfr0(const struct kvm_vcpu *vcpu) > +static u64 get_pvm_id_aa64mmfr0(const struct kvm_vcpu *vcpu) > { > u64 set_mask; > > @@ -192,22 +192,19 @@ u64 get_pvm_id_aa64mmfr0(const struct kvm_vcpu *vcpu) > return (id_aa64mmfr0_el1_sys_val & PVM_ID_AA64MMFR0_ALLOW) | set_mask; > } > > -u64 get_pvm_id_aa64mmfr1(const struct kvm_vcpu *vcpu) > +static u64 get_pvm_id_aa64mmfr1(const struct kvm_vcpu *vcpu) > { > return id_aa64mmfr1_el1_sys_val & PVM_ID_AA64MMFR1_ALLOW; > } > > -u64 get_pvm_id_aa64mmfr2(const struct kvm_vcpu *vcpu) > +static u64 get_pvm_id_aa64mmfr2(const struct kvm_vcpu *vcpu) > { > return id_aa64mmfr2_el1_sys_val & PVM_ID_AA64MMFR2_ALLOW; > } > > -/* Read a sanitized cpufeature ID register by its sys_reg_desc. */ > -static u64 read_id_reg(const struct kvm_vcpu *vcpu, > - struct sys_reg_desc const *r) > +/* Read a sanitized cpufeature ID register by its encoding */ > +u64 pvm_read_id_reg(const struct kvm_vcpu *vcpu, u32 id) > { > - u32 id = reg_to_encoding(r); > - > switch (id) { > case SYS_ID_AA64PFR0_EL1: > return get_pvm_id_aa64pfr0(vcpu); > @@ -245,6 +242,12 @@ static u64 read_id_reg(const struct kvm_vcpu *vcpu, > return 0; > } > > +static u64 read_id_reg(const struct kvm_vcpu *vcpu, > + struct sys_reg_desc const *r) > +{ > + return pvm_read_id_reg(vcpu, reg_to_encoding(r)); > +} > + > /* > * Accessor for AArch32 feature id registers. > * > -- > 2.30.2 > Reviewed-by: Andrew Jones _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel