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From: kernel test robot <lkp@intel.com>
To: Bharat Bhushan <bbhushan2@marvell.com>,
	will@kernel.org, mark.rutland@arm.com, robh+dt@kernel.org,
	bbudiredla@marvell.com, sgoutham@marvell.com,
	linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org
Cc: kbuild-all@lists.01.org, Bharat Bhushan <bbhushan2@marvell.com>
Subject: Re: [PATCH v5 2/4] perf/marvell: CN10k DDR performance monitor support
Date: Mon, 25 Oct 2021 17:40:52 +0800	[thread overview]
Message-ID: <202110251714.ooSJVRiu-lkp@intel.com> (raw)
In-Reply-To: <20211018042015.25151-3-bbhushan2@marvell.com>

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Hi Bharat,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on robh/for-next]
[also build test ERROR on linus/master v5.15-rc6 next-20211022]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/0day-ci/linux/commits/Bharat-Bhushan/cn10k-DDR-Performance-monitor-support/20211018-122220
base:   https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-next
config: xtensa-allyesconfig (attached as .config)
compiler: xtensa-linux-gcc (GCC) 11.2.0
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # https://github.com/0day-ci/linux/commit/c165c120469cac5c73b7a7e9d027c284eb09c6d1
        git remote add linux-review https://github.com/0day-ci/linux
        git fetch --no-tags linux-review Bharat-Bhushan/cn10k-DDR-Performance-monitor-support/20211018-122220
        git checkout c165c120469cac5c73b7a7e9d027c284eb09c6d1
        # save the attached .config to linux build tree
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross ARCH=xtensa 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All errors (new ones prefixed by >>):

   drivers/perf/marvell_cn10k_ddr_pmu.c: In function 'cn10k_ddr_perf_counter_enable':
>> drivers/perf/marvell_cn10k_ddr_pmu.c:352:23: error: implicit declaration of function 'readq_relaxed'; did you mean 'readl_relaxed'? [-Werror=implicit-function-declaration]
     352 |                 val = readq_relaxed(pmu->base + reg);
         |                       ^~~~~~~~~~~~~
         |                       readl_relaxed
>> drivers/perf/marvell_cn10k_ddr_pmu.c:359:17: error: implicit declaration of function 'writeq_relaxed'; did you mean 'writel_relaxed'? [-Werror=implicit-function-declaration]
     359 |                 writeq_relaxed(val, pmu->base + reg);
         |                 ^~~~~~~~~~~~~~
         |                 writel_relaxed
   drivers/perf/marvell_cn10k_ddr_pmu.c: In function 'cn10k_ddr_perf_probe':
   drivers/perf/marvell_cn10k_ddr_pmu.c:548:74: error: format '%llx' expects argument of type 'long long unsigned int', but argument 4 has type 'resource_size_t' {aka 'unsigned int'} [-Werror=format=]
     548 |         name = devm_kasprintf(ddr_pmu->dev, GFP_KERNEL, "mrvl_ddr_pmu_%llx",
         |                                                                       ~~~^
         |                                                                          |
         |                                                                          long long unsigned int
         |                                                                       %x
     549 |                               res->start);
         |                               ~~~~~~~~~~                                  
         |                                  |
         |                                  resource_size_t {aka unsigned int}
   In file included from include/asm-generic/bug.h:22,
                    from ./arch/xtensa/include/generated/asm/bug.h:1,
                    from include/linux/bug.h:5,
                    from include/linux/io.h:11,
                    from drivers/perf/marvell_cn10k_ddr_pmu.c:8:
   include/linux/kern_levels.h:5:25: error: format '%llx' expects argument of type 'long long unsigned int', but argument 2 has type 'resource_size_t' {aka 'unsigned int'} [-Werror=format=]
       5 | #define KERN_SOH        "\001"          /* ASCII Start Of Header */
         |                         ^~~~~~
   include/linux/printk.h:418:25: note: in definition of macro 'printk_index_wrap'
     418 |                 _p_func(_fmt, ##__VA_ARGS__);                           \
         |                         ^~~~
   include/linux/printk.h:519:9: note: in expansion of macro 'printk'
     519 |         printk(KERN_INFO pr_fmt(fmt), ##__VA_ARGS__)
         |         ^~~~~~
   include/linux/kern_levels.h:14:25: note: in expansion of macro 'KERN_SOH'
      14 | #define KERN_INFO       KERN_SOH "6"    /* informational */
         |                         ^~~~~~~~
   include/linux/printk.h:519:16: note: in expansion of macro 'KERN_INFO'
     519 |         printk(KERN_INFO pr_fmt(fmt), ##__VA_ARGS__)
         |                ^~~~~~~~~
   drivers/perf/marvell_cn10k_ddr_pmu.c:557:9: note: in expansion of macro 'pr_info'
     557 |         pr_info("CN10K DDR PMU Driver for ddrc@%llx\n", res->start);
         |         ^~~~~~~
   cc1: all warnings being treated as errors


vim +352 drivers/perf/marvell_cn10k_ddr_pmu.c

   338	
   339	static void cn10k_ddr_perf_counter_enable(struct cn10k_ddr_pmu *pmu,
   340						  int counter, bool enable)
   341	{
   342		u32 reg;
   343		u64 val;
   344	
   345		if (counter > DDRC_PERF_NUM_COUNTERS) {
   346			pr_err("Error: unsupported counter %d\n", counter);
   347			return;
   348		}
   349	
   350		if (counter < DDRC_PERF_NUM_GEN_COUNTERS) {
   351			reg = DDRC_PERF_CFG(counter);
 > 352			val = readq_relaxed(pmu->base + reg);
   353	
   354			if (enable)
   355				val |= EVENT_ENABLE;
   356			else
   357				val &= ~EVENT_ENABLE;
   358	
 > 359			writeq_relaxed(val, pmu->base + reg);
   360		} else {
   361			val = readq_relaxed(pmu->base + DDRC_PERF_CNT_FREERUN_EN);
   362			if (enable) {
   363				if (counter == DDRC_PERF_READ_COUNTER_IDX)
   364					val |= DDRC_PERF_FREERUN_READ_EN;
   365				else
   366					val |= DDRC_PERF_FREERUN_WRITE_EN;
   367			} else {
   368				if (counter == DDRC_PERF_READ_COUNTER_IDX)
   369					val &= ~DDRC_PERF_FREERUN_READ_EN;
   370				else
   371					val &= ~DDRC_PERF_FREERUN_WRITE_EN;
   372			}
   373			writeq_relaxed(val, pmu->base + DDRC_PERF_CNT_FREERUN_EN);
   374		}
   375	}
   376	

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org

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  parent reply	other threads:[~2021-10-25  9:43 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-18  4:20 [PATCH v5 0/4] cn10k DDR Performance monitor support Bharat Bhushan
2021-10-18  4:20 ` [PATCH v5 1/4] dt-bindings: perf: marvell: cn10k ddr performance monitor Bharat Bhushan
2021-10-18  4:20 ` [PATCH v5 2/4] perf/marvell: CN10k DDR performance monitor support Bharat Bhushan
2021-10-18  4:37   ` Bhaskara Budiredla
2021-10-25  5:20   ` kernel test robot
2021-10-25  9:40   ` kernel test robot [this message]
2021-10-25 16:37   ` kernel test robot
2021-10-18  4:20 ` [PATCH v5 3/4] perf/marvell: cn10k DDR perfmon event overflow handling Bharat Bhushan
2021-10-18  4:37   ` Bhaskara Budiredla
2021-10-18  4:20 ` [PATCH v5 4/4] perf/marvell: cn10k DDR perf event core ownership Bharat Bhushan
2021-10-18  4:37   ` Bhaskara Budiredla

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