From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2A499C433EF for ; Wed, 27 Oct 2021 11:11:20 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E88BE60F9B for ; Wed, 27 Oct 2021 11:11:19 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org E88BE60F9B Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=iJWHnxaHP+TweScDXzgPg8bVMeBwR5qt/gxyalw+S9U=; b=4nzWZdNjSK/igH WiituXWbn2V2GUPR8vpjLZgiefhnkG7MckZGyiDVWzrbCrdOnAj96A1+RvTrZBF/Xz7t6VQVwjXwJ ULSb0XkcSKsInqcG9VEDN2rjrr8RFVu9yToGrJwdSgZq14gMb7azaPDYqY0BHWaayt5vqMYAk2w0h 2nwQJ/6up+tJhCeDdAqrjWdaBhrlP5Zfg3Xiq/JiLtfAgYqROfcEOFQOm3DZWIX0i3/3bzVF0xGSv IuxQZuAC68+4Zk+x0kz8tA3ffmzNVxK3QI20fBq34tYItv5s7EHQAv2BwIkEOvjFUSqHF71SQvm80 aTk6Q56TbXUaRl61ACpw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mfgoi-004g3j-Br; Wed, 27 Oct 2021 11:10:00 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mfgof-004g3L-Iy for linux-arm-kernel@lists.infradead.org; Wed, 27 Oct 2021 11:09:59 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 4DD0A1FB; Wed, 27 Oct 2021 04:09:53 -0700 (PDT) Received: from C02TD0UTHF1T.local (unknown [10.57.72.240]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id E20E53F73D; Wed, 27 Oct 2021 04:09:50 -0700 (PDT) Date: Wed, 27 Oct 2021 12:09:47 +0100 From: Mark Rutland To: Reiji Watanabe Cc: Robin Murphy , Catalin Marinas , Will Deacon , Marc Zyngier , linux-arm-kernel@lists.infradead.org, Peter Shier , Ricardo Koller , Oliver Upton , Jing Zhang , Raghavendra Rao Anata Subject: Re: [PATCH] arm64: clear_page() shouldn't use DC ZVA when DCZID_EL0.DZP == 1 Message-ID: <20211027110947.GB51402@C02TD0UTHF1T.local> References: <20211026034844.1393437-1-reijiw@google.com> <0cd301eb-c2a4-bc90-46b8-cb4d4e25978b@arm.com> <20211026122300.GB34073@C02TD0UTHF1T.local> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211027_040957_717811_5A3652A2 X-CRM114-Status: GOOD ( 28.72 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, Oct 26, 2021 at 11:44:51PM -0700, Reiji Watanabe wrote: > On Tue, Oct 26, 2021 at 5:23 AM Mark Rutland wrote: > > On Tue, Oct 26, 2021 at 12:22:20PM +0100, Robin Murphy wrote: > > > On 2021-10-26 04:48, Reiji Watanabe wrote: > > > > Currently, clear_page() uses DC ZVA instruction unconditionally. But it > > > > should make sure that DCZID_EL0.DZP, which indicates whether or not use > > > > of DC ZVA instruction is prohibited, is zero when using the instruction. > > > > Use stp as memset does instead when DCZID_EL0.DZP == 1. > > > > > > > > Signed-off-by: Reiji Watanabe > > > > --- > > > > arch/arm64/lib/clear_page.S | 11 +++++++++++ > > > > 1 file changed, 11 insertions(+) > > > > > > > > diff --git a/arch/arm64/lib/clear_page.S b/arch/arm64/lib/clear_page.S > > > > index b84b179edba3..7ce1bfa4081c 100644 > > > > --- a/arch/arm64/lib/clear_page.S > > > > +++ b/arch/arm64/lib/clear_page.S > > > > @@ -16,6 +16,7 @@ > > > > */ > > > > SYM_FUNC_START_PI(clear_page) > > > > mrs x1, dczid_el0 > > > > + tbnz x1, #4, 2f /* Branch if DC GVA is prohibited */ > > > > DCZID_EL0.DZP (AKA DCZID_EL0[4]) says whether all of DC {ZVA,GVA,GZVA} > > are prohibited. This loop uses DZ ZVA, not GC GVA, so it'd be nice to > > s/GVA/ZVA/ here. > > Thank you for catching it ! I will fix that. > > > Howver, `DC GVA` and `DC GZVA` are both used in mte_set_mem_tag_range(), > > which'll need a similar update... > > Yes, I'm aware of that and mte_zero_clear_page_tags() needs to get > updated as well. But, Since I'm not familiar with MTE (and I don't > have any plans to use MTE yet), I didn't work on them (I'm not sure > how I can test them). > I might try to fix them separately later as well when I have time > (not so soon most likely though). My view is that we should either: * Document that we require DCZID_EL0.DZP==0, as is implicitly the case today. * Fix *all* usage of DC {ZVA,GVZ,GZVA} to work with DCZID_EL0.DZP==1. ... otherwise we're just hiding the problem rather than fixing it. QEMU TCG mode has MTE support, so it should be possible to test using that in a configuration such as: -machine virt,virtualization=on,mte=on -cpu max ... then you can hack the EL2 stub code in head.S to initialize HCR_EL2.TDZ=1 before dropping to EL1 (and reporting that the kernel started at EL1). Thanks, Mark. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel