From: Tudor Ambarus <tudor.ambarus@microchip.com>
To: <michael@walle.cc>, <vigneshr@ti.com>, <p.yadav@ti.com>
Cc: macromorgan@hotmail.com, jaimeliao@mxic.com.tw,
Tudor Ambarus <tudor.ambarus@microchip.com>,
richard@nod.at, esben@geanix.com, linux@rasmusvillemoes.dk,
knaerzche@gmail.com, linux-mtd@lists.infradead.org,
linux-arm-kernel@lists.infradead.org, code@reto-schneider.ch,
miquel.raynal@bootlin.com, heiko.thiery@gmail.com, sr@denx.de,
figgyc@figgyc.uk, mail@david-bauer.net, zhengxunli@mxic.com.tw
Subject: [PATCH v3 13/25] mtd: spi-nor: sst: Get rid of SST_WRITE flash_info flag
Date: Fri, 29 Oct 2021 20:26:21 +0300 [thread overview]
Message-ID: <20211029172633.886453-14-tudor.ambarus@microchip.com> (raw)
In-Reply-To: <20211029172633.886453-1-tudor.ambarus@microchip.com>
The flash_info flags should be generic and not manufacturer specific.
Get rid of the manufacturer specific flag and use the late_init() fixup
hook instead.
Please note that sst_write is now set at flash level and not globally,
per manufacturer. Manufacturer hooks are generally a bad idea, because
it affects settings for all the flashes and we might end up with fixups
for "manufacturer settings".
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
---
drivers/mtd/spi-nor/core.h | 1 -
drivers/mtd/spi-nor/sst.c | 100 +++++++++++++++++++++----------------
2 files changed, 58 insertions(+), 43 deletions(-)
diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h
index f6c4b6f4743b..6fc63ef4267b 100644
--- a/drivers/mtd/spi-nor/core.h
+++ b/drivers/mtd/spi-nor/core.h
@@ -336,7 +336,6 @@ struct flash_info {
u32 flags;
#define SECT_4K BIT(0) /* SPINOR_OP_BE_4K works uniformly */
#define SPI_NOR_NO_ERASE BIT(1) /* No erase command needed */
-#define SST_WRITE BIT(2) /* use SST byte programming */
#define SPI_NOR_NO_FR BIT(3) /* Can't do fastread */
#define SECT_4K_PMC BIT(4) /* SPINOR_OP_BE_4K_PMC works uniformly */
#define SPI_NOR_DUAL_READ BIT(5) /* Flash supports Dual Read */
diff --git a/drivers/mtd/spi-nor/sst.c b/drivers/mtd/spi-nor/sst.c
index 3593aae0920f..40e55b531edb 100644
--- a/drivers/mtd/spi-nor/sst.c
+++ b/drivers/mtd/spi-nor/sst.c
@@ -55,42 +55,6 @@ static const struct spi_nor_fixups sst26vf_fixups = {
.late_init = sst26vf_late_init,
};
-static const struct flash_info sst_parts[] = {
- /* SST -- large erase sizes are "overlays", "sectors" are 4K */
- { "sst25vf040b", INFO(0xbf258d, 0, 64 * 1024, 8,
- SECT_4K | SST_WRITE | SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) },
- { "sst25vf080b", INFO(0xbf258e, 0, 64 * 1024, 16,
- SECT_4K | SST_WRITE | SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) },
- { "sst25vf016b", INFO(0xbf2541, 0, 64 * 1024, 32,
- SECT_4K | SST_WRITE | SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) },
- { "sst25vf032b", INFO(0xbf254a, 0, 64 * 1024, 64,
- SECT_4K | SST_WRITE | SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) },
- { "sst25vf064c", INFO(0xbf254b, 0, 64 * 1024, 128,
- SECT_4K | SPI_NOR_4BIT_BP | SPI_NOR_HAS_LOCK |
- SPI_NOR_SWP_IS_VOLATILE) },
- { "sst25wf512", INFO(0xbf2501, 0, 64 * 1024, 1,
- SECT_4K | SST_WRITE | SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) },
- { "sst25wf010", INFO(0xbf2502, 0, 64 * 1024, 2,
- SECT_4K | SST_WRITE | SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) },
- { "sst25wf020", INFO(0xbf2503, 0, 64 * 1024, 4,
- SECT_4K | SST_WRITE | SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) },
- { "sst25wf020a", INFO(0x621612, 0, 64 * 1024, 4, SECT_4K | SPI_NOR_HAS_LOCK) },
- { "sst25wf040b", INFO(0x621613, 0, 64 * 1024, 8, SECT_4K | SPI_NOR_HAS_LOCK) },
- { "sst25wf040", INFO(0xbf2504, 0, 64 * 1024, 8,
- SECT_4K | SST_WRITE | SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) },
- { "sst25wf080", INFO(0xbf2505, 0, 64 * 1024, 16,
- SECT_4K | SST_WRITE | SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) },
- { "sst26wf016b", INFO(0xbf2651, 0, 64 * 1024, 32,
- SECT_4K | SPI_NOR_DUAL_READ |
- SPI_NOR_QUAD_READ) },
- { "sst26vf016b", INFO(0xbf2641, 0, 64 * 1024, 32,
- SECT_4K | SPI_NOR_DUAL_READ) },
- { "sst26vf064b", INFO(0xbf2643, 0, 64 * 1024, 128,
- SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
- SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE)
- .fixups = &sst26vf_fixups },
-};
-
static int sst_write(struct mtd_info *mtd, loff_t to, size_t len,
size_t *retlen, const u_char *buf)
{
@@ -177,19 +141,71 @@ static int sst_write(struct mtd_info *mtd, loff_t to, size_t len,
return ret;
}
-static void sst_late_init(struct spi_nor *nor)
+static void sst_write_late_init(struct spi_nor *nor)
{
- if (nor->info->flags & SST_WRITE)
- nor->mtd._write = sst_write;
+ nor->mtd._write = sst_write;
}
-static const struct spi_nor_fixups sst_fixups = {
- .late_init = sst_late_init,
+static const struct spi_nor_fixups sst_write_fixup = {
+ .late_init = sst_write_late_init,
+};
+
+static const struct flash_info sst_parts[] = {
+ /* SST -- large erase sizes are "overlays", "sectors" are 4K */
+ { "sst25vf040b", INFO(0xbf258d, 0, 64 * 1024, 8,
+ SECT_4K | SPI_NOR_HAS_LOCK |
+ SPI_NOR_SWP_IS_VOLATILE)
+ .fixups = &sst_write_fixup },
+ { "sst25vf080b", INFO(0xbf258e, 0, 64 * 1024, 16,
+ SECT_4K | SPI_NOR_HAS_LOCK |
+ SPI_NOR_SWP_IS_VOLATILE)
+ .fixups = &sst_write_fixup },
+ { "sst25vf016b", INFO(0xbf2541, 0, 64 * 1024, 32,
+ SECT_4K | SPI_NOR_HAS_LOCK |
+ SPI_NOR_SWP_IS_VOLATILE)
+ .fixups = &sst_write_fixup },
+ { "sst25vf032b", INFO(0xbf254a, 0, 64 * 1024, 64,
+ SECT_4K | SPI_NOR_HAS_LOCK |
+ SPI_NOR_SWP_IS_VOLATILE)
+ .fixups = &sst_write_fixup },
+ { "sst25vf064c", INFO(0xbf254b, 0, 64 * 1024, 128,
+ SECT_4K | SPI_NOR_4BIT_BP | SPI_NOR_HAS_LOCK |
+ SPI_NOR_SWP_IS_VOLATILE) },
+ { "sst25wf512", INFO(0xbf2501, 0, 64 * 1024, 1,
+ SECT_4K | SPI_NOR_HAS_LOCK |
+ SPI_NOR_SWP_IS_VOLATILE)
+ .fixups = &sst_write_fixup },
+ { "sst25wf010", INFO(0xbf2502, 0, 64 * 1024, 2,
+ SECT_4K | SPI_NOR_HAS_LOCK |
+ SPI_NOR_SWP_IS_VOLATILE)
+ .fixups = &sst_write_fixup },
+ { "sst25wf020", INFO(0xbf2503, 0, 64 * 1024, 4,
+ SECT_4K | SPI_NOR_HAS_LOCK |
+ SPI_NOR_SWP_IS_VOLATILE)
+ .fixups = &sst_write_fixup },
+ { "sst25wf020a", INFO(0x621612, 0, 64 * 1024, 4, SECT_4K | SPI_NOR_HAS_LOCK) },
+ { "sst25wf040b", INFO(0x621613, 0, 64 * 1024, 8, SECT_4K | SPI_NOR_HAS_LOCK) },
+ { "sst25wf040", INFO(0xbf2504, 0, 64 * 1024, 8,
+ SECT_4K | SPI_NOR_HAS_LOCK |
+ SPI_NOR_SWP_IS_VOLATILE)
+ .fixups = &sst_write_fixup },
+ { "sst25wf080", INFO(0xbf2505, 0, 64 * 1024, 16,
+ SECT_4K | SPI_NOR_HAS_LOCK |
+ SPI_NOR_SWP_IS_VOLATILE)
+ .fixups = &sst_write_fixup },
+ { "sst26wf016b", INFO(0xbf2651, 0, 64 * 1024, 32,
+ SECT_4K | SPI_NOR_DUAL_READ |
+ SPI_NOR_QUAD_READ) },
+ { "sst26vf016b", INFO(0xbf2641, 0, 64 * 1024, 32,
+ SECT_4K | SPI_NOR_DUAL_READ) },
+ { "sst26vf064b", INFO(0xbf2643, 0, 64 * 1024, 128,
+ SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
+ SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE)
+ .fixups = &sst26vf_fixups },
};
const struct spi_nor_manufacturer spi_nor_sst = {
.name = "sst",
.parts = sst_parts,
.nparts = ARRAY_SIZE(sst_parts),
- .fixups = &sst_fixups,
};
--
2.25.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-10-29 18:03 UTC|newest]
Thread overview: 78+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-29 17:26 [PATCH v3 00/25] mtd: spi-nor: Clean params init Tudor Ambarus
2021-10-29 17:26 ` [PATCH v3 01/25] mtd: spi-nor: core: Fix spi_nor_flash_parameter otp description Tudor Ambarus
2021-11-09 8:18 ` Michael Walle
2021-10-29 17:26 ` [PATCH v3 02/25] mtd: spi-nor: core: Use container_of to get the pointer to struct spi_nor Tudor Ambarus
2021-11-09 8:21 ` Michael Walle
2021-11-15 10:59 ` Pratyush Yadav
2021-10-29 17:26 ` [PATCH v3 03/25] mtd: spi-nor: Introduce spi_nor_set_mtd_info() Tudor Ambarus
2021-11-09 8:22 ` Michael Walle
2021-11-15 18:52 ` Pratyush Yadav
2021-11-16 14:25 ` Tudor.Ambarus
2021-11-16 18:11 ` Pratyush Yadav
2021-11-17 14:36 ` Tudor.Ambarus
2021-11-19 18:23 ` Pratyush Yadav
2021-11-22 8:38 ` Tudor.Ambarus
2021-10-29 17:26 ` [PATCH v3 04/25] mtd: spi-nor: Get rid of nor->page_size Tudor Ambarus
2021-11-09 8:24 ` Michael Walle
2021-11-09 8:34 ` Tudor.Ambarus
2021-10-29 17:26 ` [PATCH v3 05/25] mtd: spi-nor: core: Introduce the late_init() hook Tudor Ambarus
2021-11-09 9:31 ` Michael Walle
2021-11-15 18:56 ` Pratyush Yadav
2021-10-29 17:26 ` [PATCH v3 06/25] mtd: spi-nor: atmel: Use flash late_init() for locking Tudor Ambarus
2021-11-09 9:31 ` Michael Walle
2021-11-15 18:59 ` Pratyush Yadav
2021-10-29 17:26 ` [PATCH v3 07/25] mtd: spi-nor: sst: " Tudor Ambarus
2021-11-09 9:34 ` Michael Walle
2021-11-15 19:00 ` Pratyush Yadav
2021-10-29 17:26 ` [PATCH v3 08/25] mtd: spi-nor: winbond: Use manufacturer late_init() for OTP ops Tudor Ambarus
2021-11-09 9:36 ` Michael Walle
2021-11-15 19:00 ` Pratyush Yadav
2021-10-29 17:26 ` [PATCH v3 09/25] mtd: spi-nor: xilinx: Use manufacturer late_init() to set setup method Tudor Ambarus
2021-11-09 9:43 ` Michael Walle
2021-11-15 19:01 ` Pratyush Yadav
2021-10-29 17:26 ` [PATCH v3 10/25] mtd: spi-nor: sst: Use manufacturer late_init() to set _write() Tudor Ambarus
2021-11-09 9:47 ` Michael Walle
2021-11-09 10:22 ` Tudor.Ambarus
2021-11-09 10:23 ` Tudor.Ambarus
2021-11-09 10:24 ` Michael Walle
2021-11-15 19:03 ` Pratyush Yadav
2021-10-29 17:26 ` [PATCH v3 11/25] mtd: spi-nor: spansion: Use manufacturer late_init() Tudor Ambarus
2021-11-09 9:48 ` Michael Walle
2021-11-15 19:06 ` Pratyush Yadav
2021-10-29 17:26 ` [PATCH v3 12/25] mtd: spi-nor: core: Call spi_nor_post_sfdp_fixups() only when SFDP is defined Tudor Ambarus
2021-11-09 10:18 ` Michael Walle
2021-10-29 17:26 ` Tudor Ambarus [this message]
2021-11-09 12:21 ` [PATCH v3 13/25] mtd: spi-nor: sst: Get rid of SST_WRITE flash_info flag Michael Walle
2021-11-09 12:31 ` Tudor.Ambarus
2021-11-12 21:28 ` Michael Walle
2021-10-29 17:26 ` [PATCH v3 14/25] mtd: spi-nor: Introduce flash_info flags masks Tudor Ambarus
2021-11-12 21:50 ` Michael Walle
2021-11-15 4:55 ` Tudor.Ambarus
2021-10-29 17:26 ` [PATCH v3 15/25] mtd: spi-nor: Introduce spi_nor_nonsfdp_init_flags() Tudor Ambarus
2021-11-15 19:12 ` Pratyush Yadav
2021-10-29 17:26 ` [PATCH v3 16/25] mtd: spi-nor: Introduce spi_nor_init_fixup_flags() Tudor Ambarus
2021-11-16 10:57 ` Pratyush Yadav
2021-10-29 17:26 ` [PATCH v3 17/25] mtd: spi-nor: core: Introduce SPI_NOR_PARSE_SFDP Tudor Ambarus
2021-10-29 17:26 ` [PATCH v3 18/25] mtd: spi-nor: core: Init flash params based on SFDP first for new flash additions Tudor Ambarus
2021-11-16 11:07 ` Pratyush Yadav
2021-10-29 17:26 ` [PATCH v3 19/25] mtd: spi-nor: core: Move spi_nor_set_addr_width() in spi_nor_setup() Tudor Ambarus
2021-11-12 21:53 ` Michael Walle
2021-10-29 17:26 ` [PATCH v3 20/25] mtd: spi-nor: sst: sst26vf064b: Init flash based on SFDP Tudor Ambarus
2021-10-29 17:31 ` Tudor.Ambarus
2021-11-09 12:25 ` Michael Walle
2021-11-09 12:33 ` Tudor.Ambarus
2021-11-09 12:37 ` Michael Walle
2021-10-29 17:26 ` [PATCH v3 21/25] mtd: spi-nor: winbond: w25q256jvm: " Tudor Ambarus
2021-10-29 17:31 ` Tudor.Ambarus
2021-10-29 17:26 ` [PATCH v3 22/25] mtd: spi-nor: spansion: s25fl256s0: Skip SFDP parsing Tudor Ambarus
2021-10-29 17:26 ` [PATCH v3 23/25] mtd: spi-nor: gigadevice: gd25q256: Init flash based on SFDP Tudor Ambarus
2021-10-29 17:33 ` Tudor.Ambarus
2021-10-29 17:26 ` [PATCH v3 24/25] mtd: spi-nor: issi: is25lp256: " Tudor Ambarus
2021-10-29 17:33 ` Tudor.Ambarus
2021-10-29 17:26 ` [PATCH v3 25/25] mtd: spi-nor: macronix: mx25l25635e: " Tudor Ambarus
2021-10-29 17:34 ` Tudor.Ambarus
2021-11-08 10:15 ` [PATCH v3 00/25] mtd: spi-nor: Clean params init Tudor.Ambarus
2021-11-08 10:31 ` Michael Walle
2021-11-16 11:36 ` Pratyush Yadav
2021-11-16 11:56 ` Michael Walle
2021-11-17 13:17 ` (subset)[PATCH " Tudor Ambarus
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20211029172633.886453-14-tudor.ambarus@microchip.com \
--to=tudor.ambarus@microchip.com \
--cc=code@reto-schneider.ch \
--cc=esben@geanix.com \
--cc=figgyc@figgyc.uk \
--cc=heiko.thiery@gmail.com \
--cc=jaimeliao@mxic.com.tw \
--cc=knaerzche@gmail.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-mtd@lists.infradead.org \
--cc=linux@rasmusvillemoes.dk \
--cc=macromorgan@hotmail.com \
--cc=mail@david-bauer.net \
--cc=michael@walle.cc \
--cc=miquel.raynal@bootlin.com \
--cc=p.yadav@ti.com \
--cc=richard@nod.at \
--cc=sr@denx.de \
--cc=vigneshr@ti.com \
--cc=zhengxunli@mxic.com.tw \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).