From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AF077C433F5 for ; Mon, 8 Nov 2021 10:10:02 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 6A76161179 for ; Mon, 8 Nov 2021 10:10:02 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 6A76161179 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=umncNK7tx6Sz3lE67iC67b4geD3EeBx2+p0Ph1+nFws=; b=qrwXbALREuRKMQ p8RhPAEgB2jDCkliihIAkjOTWxbC97KC3R2DvuUMGdHSdenGEZf4xivp6SzdVzILYSrC591srVaH/ 11DZJhrcQkHt+YdlCbZEQ+ngpyLSu61qLzV+yjqpTZ5iED0Q3QEQNqvGhk7AMBMb3wUdrYnHotbKy lgr2yQoG0S6GmzB9KnsTpQG6lmopRGFkQgnT/H4VCO/zvEdMgRcYCEc9ygcxFVxeyUYE58g/b+W3q ihKHmXafd5sIQ04Pt6TO/QlwljMkLRSpQwpVZ4sEOmVZeByQ6CJG2jOcFFbcOQrwuWxwJYYRF8zW/ leMhyoIxTWztd8HOIPzw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mk1ZD-00Fy3U-4e; Mon, 08 Nov 2021 10:07:55 +0000 Received: from mail.kernel.org ([198.145.29.99]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mk1ZA-00Fy38-6O for linux-arm-kernel@lists.infradead.org; Mon, 08 Nov 2021 10:07:53 +0000 Received: by mail.kernel.org (Postfix) with ESMTPSA id 0619761075; Mon, 8 Nov 2021 10:07:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1636366071; bh=yKXTOCidq/NCJEKTpKPeeIYIOZlzk4dULKbJT/WT+g8=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=bHB4nXzq1qfxPraM22E/jzzKlr/+ZL+rgWDsFkPAnFoKOhUa6AiY20A+fwo0UvlEo RcWPrgiywx5b8IUshSs+Jup8sW70mUdlcV5NunetYC3pKCFNAQx0xZeXcp+yUPhOdN eUrJibXSOaosFZH2QeYcNS+e4XWpXRdovvLEs86sT/mLEpHc7J1t/SlpB6fs7O1M1Z uGvgPGPuJ5tpon638MsYj5ohjgH5kyaqQGr5HjUmk4Ip9yOzmLK50TSgdv0O++iObT l+yuULaN5rjkBn0NH6IVTFeKbTChGwlAIL8wI2tuwhoDEAqKn0iUcnOpxFyjDA412C cVhkzOnZ6OXCg== Date: Mon, 8 Nov 2021 10:07:46 +0000 From: Will Deacon To: Mark Rutland Cc: linux-arm-kernel@lists.infradead.org, alexandru.elisei@arm.com, catalin.marinas@arm.com, james.morse@arm.com, maz@kernel.org, stable@vger.kernel.org, suzuki.poulose@arm.com Subject: Re: [PATCH] arm64/kvm: extract ESR_ELx.EC only Message-ID: <20211108100745.GA2328@willie-the-truck> References: <20211103110545.4613-1-mark.rutland@arm.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20211103110545.4613-1-mark.rutland@arm.com> User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211108_020752_276672_74DCF67D X-CRM114-Status: GOOD ( 18.43 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Nov 03, 2021 at 11:05:45AM +0000, Mark Rutland wrote: > Since ARMv8.0 the upper 32 bits of ESR_ELx have been RES0, and recently > some of the upper bits gained a meaning and can be non-zero. For > example, when FEAT_LS64 is implemented, ESR_ELx[36:32] contain ISS2, > which for an ST64BV or ST64BV0 can be non-zero. This can be seen in ARM > DDI 0487G.b, page D13-3145, section D13.2.37. > > Generally, we must not rely on RES0 bit remaining zero in future, and > when extracting ESR_ELx.EC we must mask out all other bits. > > All C code uses the ESR_ELx_EC() macro, which masks out the irrelevant > bits, and therefore no alterations are required to C code to avoid > consuming irrelevant bits. > > In a couple of places the KVM assembly extracts ESR_ELx.EC using LSR on > an X register, and so could in theory consume previously RES0 bits. In > both cases this is for comparison with EC values ESR_ELx_EC_HVC32 and > ESR_ELx_EC_HVC64, for which the upper bits of ESR_ELx must currently be > zero, but this could change in future. > > This patch adjusts the KVM vectors to use UBFX rather than LSR to > extract ESR_ELx.EC, ensuring these are robust to future additions to > ESR_ELx. > > Cc: stable@vger.kernel.org > Signed-off-by: Mark Rutland > Cc: Alexandru Elisei > Cc: Catalin Marinas > Cc: James Morse > Cc: Marc Zyngier > Cc: Suzuki K Poulose > Cc: Will Deacon > --- > arch/arm64/include/asm/esr.h | 1 + > arch/arm64/kvm/hyp/hyp-entry.S | 2 +- > arch/arm64/kvm/hyp/nvhe/host.S | 2 +- > 3 files changed, 3 insertions(+), 2 deletions(-) Acked-by: Will Deacon Will _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel