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From: Ard Biesheuvel <ardb@kernel.org>
To: linux-arm-kernel@lists.infradead.org
Cc: Ard Biesheuvel <ardb@kernel.org>,
	Russell King <linux@armlinux.org.uk>,
	Arnd Bergmann <arnd@arndb.de>, Kees Cook <keescook@chromium.org>,
	Keith Packard <keithpac@amazon.com>,
	Linus Walleij <linus.walleij@linaro.org>,
	Nick Desaulniers <ndesaulniers@google.com>,
	Nicolas Pitre <nico@fluxnic.net>
Subject: [PATCH v4 6/9] ARM: backtrace-clang: avoid crash on bogus frame pointer
Date: Mon, 15 Nov 2021 09:47:29 +0100	[thread overview]
Message-ID: <20211115084732.3704393-7-ardb@kernel.org> (raw)
In-Reply-To: <20211115084732.3704393-1-ardb@kernel.org>

The Clang backtrace code dereferences the link register value pulled
from the stack to decide whether the caller was a branch-and-link
instruction, in order to subsequently decode the offset to find the
start of the calling function. Unlike other loads in this routine, this
one is not protected by a fixup, and may therefore cause a crash if the
address in question is bogus.

So let's fix this, by treating the fault as a failure to decode the 'bl'
instruction. To avoid a label renum, reuse a fixup label that guards an
instruction that cannot fault to begin with.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
---
 arch/arm/lib/backtrace-clang.S | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/lib/backtrace-clang.S b/arch/arm/lib/backtrace-clang.S
index 5b2cdb1003e3..5b4bca85d06d 100644
--- a/arch/arm/lib/backtrace-clang.S
+++ b/arch/arm/lib/backtrace-clang.S
@@ -144,7 +144,7 @@ for_each_frame:	tst	frame, mask		@ Check for address exceptions
  */
 1003:		ldr	sv_lr, [sv_fp, #4]	@ get saved lr from next frame
 
-		ldr	r0, [sv_lr, #-4]	@ get call instruction
+1004:		ldr	r0, [sv_lr, #-4]	@ get call instruction
 		ldr	r3, .Lopcode+4
 		and	r2, r3, r0		@ is this a bl call
 		teq	r2, r3
@@ -164,7 +164,7 @@ finished_setup:
 /*
  * Print the function (sv_pc) and where it was called from (sv_lr).
  */
-1004:		mov	r0, sv_pc
+		mov	r0, sv_pc
 
 		mov	r1, sv_lr
 		mov	r2, frame
@@ -210,7 +210,7 @@ ENDPROC(c_backtrace)
 		.long	1001b, 1006b
 		.long	1002b, 1006b
 		.long	1003b, 1006b
-		.long	1004b, 1006b
+		.long	1004b, finished_setup
 		.long   1005b, 1006b
 		.popsection
 
-- 
2.30.2


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  parent reply	other threads:[~2021-11-15  8:50 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-15  8:47 [PATCH v4 0/9] ARM: add support for IRQ stacks Ard Biesheuvel
2021-11-15  8:47 ` [PATCH v4 1/9] ARM: remove some dead code Ard Biesheuvel
2021-11-15  8:47 ` [PATCH v4 2/9] ARM: assembler: introduce bl_r macro Ard Biesheuvel
2021-11-15  8:47 ` [PATCH v4 3/9] ARM: unwind: support unwinding across multiple stacks Ard Biesheuvel
2021-11-15  8:47 ` [PATCH v4 4/9] ARM: export dump_mem() to other objects Ard Biesheuvel
2021-11-15  8:47 ` [PATCH v4 5/9] ARM: unwind: dump exception stack from calling frame Ard Biesheuvel
2021-11-15  8:47 ` Ard Biesheuvel [this message]
2021-11-15  8:47 ` [PATCH v4 7/9] ARM: implement IRQ stacks Ard Biesheuvel
2021-11-15  8:47 ` [PATCH v4 8/9] ARM: call_with_stack: add unwind support Ard Biesheuvel
2021-11-15  8:47 ` [PATCH v4 9/9] ARM: run softirqs on the per-CPU IRQ stack Ard Biesheuvel

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