From: Florian Fainelli <f.fainelli@gmail.com>
To: bcm-kernel-feedback-list@broadcom.com,
linux-arm-kernel@lists.infradead.org
Cc: chunkeey@gmail.com, mnhagan88@gmail.com,
"Hauke Mehrtens" <hauke@hauke-m.de>,
"Rafał Miłecki" <zajec5@gmail.com>,
"Rob Herring" <robh+dt@kernel.org>,
"Jon Mason" <jonmason@broadcom.com>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@vger.kernel.org>,
"open list" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] ARM: dts: BCM5301X: Fix I2C controller interrupt
Date: Mon, 15 Nov 2021 09:31:07 -0800 [thread overview]
Message-ID: <20211115173107.488905-1-f.fainelli@gmail.com> (raw)
In-Reply-To: <20211027193730.3941945-1-f.fainelli@gmail.com>
On Wed, 27 Oct 2021 12:37:29 -0700, Florian Fainelli <f.fainelli@gmail.com> wrote:
> The I2C interrupt controller line is off by 32 because the datasheet
> describes interrupt inputs into the GIC which are for Shared Peripheral
> Interrupts and are starting at offset 32. The ARM GIC binding expects
> the SPI interrupts to be numbered from 0 relative to the SPI base.
>
> Fixes: bb097e3e0045 ("ARM: dts: BCM5301X: Add I2C support to the DT")
> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
> ---
Applied to https://github.com/Broadcom/stblinux/commits/devicetree/fixes, thanks!
--
Florian
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prev parent reply other threads:[~2021-11-15 17:32 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-27 19:37 [PATCH] ARM: dts: BCM5301X: Fix I2C controller interrupt Florian Fainelli
2021-10-27 20:28 ` Rafał Miłecki
2021-10-27 20:32 ` Christian Lamparter
2021-11-15 17:31 ` Florian Fainelli [this message]
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