From: Shawn Guo <shawnguo@kernel.org>
To: "Russell King (Oracle)" <rmk+kernel@armlinux.org.uk>
Cc: Andrew Lunn <andrew@lunn.ch>,
Sascha Hauer <s.hauer@pengutronix.de>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
Stefan Agner <stefan@agner.ch>, Rob Herring <robh+dt@kernel.org>,
linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org
Subject: Re: [PATCH] ARM: dts: vf610-zii-dev-rev-b: correct phy-mode for 6185 dsa link
Date: Sun, 21 Nov 2021 10:43:24 +0800 [thread overview]
Message-ID: <20211121024320.GI31998@dragon> (raw)
In-Reply-To: <E1mdDr3-006f6l-QZ@rmk-PC.armlinux.org.uk>
On Wed, Oct 20, 2021 at 04:50:13PM +0100, Russell King (Oracle) wrote:
> DT currently lists the port mode for the 88E6352 switch 1 to 88E6185
> switch 2 as "rgmii-id" but referring to the schematics, it is in fact
> a serdes link. The 88E6352 is configured with P5_MODE=6, S_SEL=1 and
> S_MODE=1, which means port 5 is configured as 1000BASE-X.
>
> This is confirmed by the value in the 88E6352 port 5 status register,
> 0x4e09, where C_MODE=9 meaning 1000BASE-X. It is also confirmed by
> the 88E6185 port 9 status register, 0x5e8c, where C_MODE=4 meaning
> cross-chip SERDES mode is selected.
>
> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Applied, thanks.
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prev parent reply other threads:[~2021-11-21 2:45 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-20 15:50 [PATCH] ARM: dts: vf610-zii-dev-rev-b: correct phy-mode for 6185 dsa link Russell King (Oracle)
2021-10-20 16:17 ` Andrew Lunn
2021-11-21 2:43 ` Shawn Guo [this message]
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