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[68.147.0.187]) by smtp.gmail.com with ESMTPSA id o2sm9788981pfu.206.2021.11.22.08.51.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Nov 2021 08:51:54 -0800 (PST) Date: Mon, 22 Nov 2021 09:51:51 -0700 From: Mathieu Poirier To: Jinlong Mao Cc: Tao Zhang , Suzuki K Poulose , Alexander Shishkin , Mike Leach , Leo Yan , Greg Kroah-Hartman , coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Tingwei Zhang , Yuanfang Zhang , Trilok Soni , Tingwei Zhang Subject: Re: [PATCH 01/10] coresight: add support to enable more coresight paths Message-ID: <20211122165151.GA2686563@p14s> References: <1634801936-15080-1-git-send-email-quic_taozha@quicinc.com> <1634801936-15080-2-git-send-email-quic_taozha@quicinc.com> <20211028180659.GC4045120@p14s> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211122_085159_536036_AE85A460 X-CRM114-Status: GOOD ( 63.65 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, Nov 22, 2021 at 11:12:03PM +0800, Jinlong Mao wrote: > Hi Mathieu, > = > Thanks for the comments. > = > I double checked the code. Please see my comments below. > = > = > On 10/29/2021 2:06 AM, Mathieu Poirier wrote: > > On Thu, Oct 21, 2021 at 03:38:47PM +0800, Tao Zhang wrote: > > > Current coresight implementation only supports enabling source > > > ETMs or STM. This patch adds support to enable more kinds of > > > coresight source to sink paths. We build a path from source to > > > sink when any source is enabled and store it in a list. When the > > > source is disabled, we fetch the corresponding path from the list > > > and decrement the refcount on each device in the path. The device > > > is disabled if the refcount reaches zero. Don't store path to > > > coresight data structure of source to avoid unnecessary change to > > > ABI. > > > Since some targets may have coresight sources other than STM and > > > ETMs, we need to add this change to support these coresight > > > devices. > > > = > > > Signed-off-by: Tingwei Zhang > > > Signed-off-by: Tao Zhang > > > --- > > > drivers/hwtracing/coresight/coresight-core.c | 100 +++++++++++-----= --- > > > 1 file changed, 56 insertions(+), 44 deletions(-) > > > = > > > diff --git a/drivers/hwtracing/coresight/coresight-core.c b/drivers/h= wtracing/coresight/coresight-core.c > > > index 8a18c71df37a..1e621d61307a 100644 > > > --- a/drivers/hwtracing/coresight/coresight-core.c > > > +++ b/drivers/hwtracing/coresight/coresight-core.c > > > @@ -37,18 +37,16 @@ struct coresight_node { > > > }; > > > /* > > > - * When operating Coresight drivers from the sysFS interface, only a= single > > > - * path can exist from a tracer (associated to a CPU) to a sink. > > > + * struct coresight_path - path from source to sink > > > + * @path: Address of path list. > > > + * @link: hook to the list. > > > */ > > > -static DEFINE_PER_CPU(struct list_head *, tracer_path); > > > +struct coresight_path { > > > + struct list_head *path; > > > + struct list_head link; > > > +}; > > For sources associated with a CPU, like ETMs, having a per-cpu way of s= toring > > paths is a definite advantage and should be kept that way. > = > Hi Mathieu, > = > Could you please share what is the advantage to handle the sources > associated with a CPU separatly ? > It is a question of efficiency. There is no point iterating through all the sources if we don't have to. > From the code, cpu id is only used to get the path of the ETM source. > = > As there will be many tpdm sources, I think it will be easier to only > maintain one list for all the sources. > = So many TPDM and many ETMs... That is definitely a reason to do better tha= n a sequential search. > > > -/* > > > - * As of this writing only a single STM can be found in CS topologie= s. Since > > > - * there is no way to know if we'll ever see more and what kind of > > > - * configuration they will enact, for the time being only define a s= ingle path > > > - * for STM. > > > - */ > > > -static struct list_head *stm_path; > > > +static LIST_HEAD(cs_active_paths); > > Then there are sources that aren't associated with a CPU like STMs and = TPDMs. > > Perhaps using an IDR or the hash of the device name as a key to a hashi= ng > > vector would be better than doing a sequential search, especially as the > > list of devices is bound to increase over time. > = > Agree with you. I will try to use IDR or=A0 the hash of the device name a= s a > key to a hashing vector. > If an IDR (or some other kind of mechanism) is used then we can use that to store paths associated with ETMs as well. That way everything works the sa= me way and access time is constant for any kind of source. > > = > > > /* > > > * When losing synchronisation a new barrier packet needs to be ins= erted at the > > > @@ -354,6 +352,7 @@ static void coresight_disable_sink(struct coresig= ht_device *csdev) > > > if (ret) > > > return; > > > coresight_control_assoc_ectdev(csdev, false); > > > + csdev->activated =3D false; > > I don't see why this is needed and without proper documentation there i= s no way > > for me to guess the logic behind the change. The ->activated flag shou= ld be > > manipulated from the command line interface only. > = > When source is disabled, but sink is still actived. It will be confused f= or > end users. > = That is how it has been working for years now. It was done this way to giv= e as much flexibility to users and keep kernel intelligence to a minimum. > > = > > > csdev->enable =3D false; > > > } > > > @@ -590,6 +589,20 @@ int coresight_enable_path(struct list_head *path= , u32 mode, void *sink_data) > > > goto out; > > > } > > > +static struct coresight_device *coresight_get_source(struct list_hea= d *path) > > > +{ > > > + struct coresight_device *csdev; > > > + > > > + if (!path) > > > + return NULL; > > > + > > > + csdev =3D list_first_entry(path, struct coresight_node, link)->csde= v; > > > + if (csdev->type !=3D CORESIGHT_DEV_TYPE_SOURCE) > > > + return NULL; > > > + > > > + return csdev; > > > +} > > > + > > > struct coresight_device *coresight_get_sink(struct list_head *path) > > > { > > > struct coresight_device *csdev; > > > @@ -1086,9 +1099,23 @@ static int coresight_validate_source(struct co= resight_device *csdev, > > > return 0; > > > } > > > +static int coresight_store_path(struct list_head *path) > > > +{ > > > + struct coresight_path *node; > > > + > > > + node =3D kzalloc(sizeof(struct coresight_path), GFP_KERNEL); > > > + if (!node) > > > + return -ENOMEM; > > > + > > > + node->path =3D path; > > > + list_add(&node->link, &cs_active_paths); > > > + > > > + return 0; > > > +} > > > + > > > int coresight_enable(struct coresight_device *csdev) > > > { > > > - int cpu, ret =3D 0; > > > + int ret =3D 0; > > > struct coresight_device *sink; > > > struct list_head *path; > > > enum coresight_dev_subtype_source subtype; > > > @@ -1133,25 +1160,9 @@ int coresight_enable(struct coresight_device *= csdev) > > > if (ret) > > > goto err_source; > > > - switch (subtype) { > > > - case CORESIGHT_DEV_SUBTYPE_SOURCE_PROC: > > > - /* > > > - * When working from sysFS it is important to keep track > > > - * of the paths that were created so that they can be > > > - * undone in 'coresight_disable()'. Since there can only > > > - * be a single session per tracer (when working from sysFS) > > > - * a per-cpu variable will do just fine. > > > - */ > > > - cpu =3D source_ops(csdev)->cpu_id(csdev); > > > - per_cpu(tracer_path, cpu) =3D path; > > > - break; > > > - case CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE: > > > - stm_path =3D path; > > > - break; > > > - default: > > > - /* We can't be here */ > > > - break; > > > - } > > > + ret =3D coresight_store_path(path); > > > + if (ret) > > > + goto err_source; > > > out: > > > mutex_unlock(&coresight_mutex); > > > @@ -1168,8 +1179,11 @@ EXPORT_SYMBOL_GPL(coresight_enable); > > > void coresight_disable(struct coresight_device *csdev) > > > { > > > - int cpu, ret; > > > + int ret; > > > struct list_head *path =3D NULL; > > > + struct coresight_path *cspath =3D NULL; > > > + struct coresight_path *cspath_next =3D NULL; > > > + struct coresight_device *src_csdev =3D NULL; > > > mutex_lock(&coresight_mutex); > > > @@ -1180,20 +1194,18 @@ void coresight_disable(struct coresight_devic= e *csdev) > > > if (!csdev->enable || !coresight_disable_source(csdev)) > > > goto out; > > > - switch (csdev->subtype.source_subtype) { > > > - case CORESIGHT_DEV_SUBTYPE_SOURCE_PROC: > > > - cpu =3D source_ops(csdev)->cpu_id(csdev); > > > - path =3D per_cpu(tracer_path, cpu); > > > - per_cpu(tracer_path, cpu) =3D NULL; > > > - break; > > > - case CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE: > > > - path =3D stm_path; > > > - stm_path =3D NULL; > > > - break; > > > - default: > > > - /* We can't be here */ > > > - break; > > > + list_for_each_entry_safe(cspath, cspath_next, &cs_active_paths, lin= k) { > > > + src_csdev =3D coresight_get_source(cspath->path); > > > + if (!src_csdev) > > > + continue; > > > + if (src_csdev =3D=3D csdev) { > > > + path =3D cspath->path; > > > + list_del(&cspath->link); > > > + kfree(cspath); > > See my comment above - I agree that sources _not_ associated with a CPU= should > > be handled differently. CPU bound sources should be kept untouched. > > = > > That is all the time I had for today, I will continue tomorrow. > > = > > Thanks, > > Mathieu > > = > > > + } > > > } > > > + if (path =3D=3D NULL) > > > + goto out; > > > coresight_disable_path(path); > > > coresight_release_path(path); > > > -- = > > > 2.17.1 > > > = _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel