From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7F47CC433EF for ; Tue, 30 Nov 2021 13:02:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=NS8bGsxkVe2iJnH8Ax2cs5sYWYOTPmBvgC8a/VrjUcM=; b=CrfoZ0K/KVdXuJ OJQQx+Fx9IhkSkCKgrkEgyB1J5TV14Wr6/yo35Vt2xWKLtEe2gzdPpBNDIyEyrpYkOwBviUqBE3FM xq8LSoMg287Jh8aqTZWOSqzfHDwaybO9yPsXzW/c0xB0dseBYiKy//TDpHKy7nXSrHwqJs11MjvrO kWoCHA6Sz78u7QiMrSpFQY2C/yxs4YPc8uJmkKgNpWY7g0nmAlrlpZDATr3BN3GbWHHaNuUcHMa+E 75PSZV/d0WJJu0M88hwUbcMzN491QVRfnZ1gIzbXXA1tMKAYsWm3o/KM0/xcqYvEgLAxYqFZKkwjG ri4aegrgAJxkfGeQn+Sg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1ms2k3-005Cdw-Q5; Tue, 30 Nov 2021 13:00:16 +0000 Received: from sin.source.kernel.org ([145.40.73.55]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1ms2jE-005CMU-2L for linux-arm-kernel@lists.infradead.org; Tue, 30 Nov 2021 12:59:26 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sin.source.kernel.org (Postfix) with ESMTPS id 32947CE177F; Tue, 30 Nov 2021 12:59:22 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 4D719C53FD1; Tue, 30 Nov 2021 12:59:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1638277160; bh=HsoOy5Fiu1753nop9s8o/nvOiiZFg/7SX63qs+DJhz8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=pVeBHAdHPC+JDJeY374DgpNt21HeD1bAmNcLoY3cb2sRFvvEyNQovhyuvHeojFaES ri/cOKN1HLm206eOYQZ563Xg3JeR5mCs5r2rJ7GUpo9RNEO02VaEsBS3Sib7Pmn2y+ jcTh03iu+jctbq6n/kr1QM7G2MB5/5v4pBNPuO8iGysQCPH5OYVm0MvXUSQ9AgGs+c QFITP4ZP4ylwyfZeFWkZbrwvwuDeL+VECutI+URes4i8yvyz2sDgNzSrJzspLy6q4E WVRfVX3kgwkl9xNxLJWuGp5gVSiBsHQ7PWhEEfrbYdHHchAc1zW2YsoZZL6uXLpk6T k2fJhGnVyv5kQ== From: Ard Biesheuvel To: linux-arm-kernel@lists.infradead.org, linux@armlinux.org.uk Cc: Ard Biesheuvel , Nicolas Pitre , Arnd Bergmann , Kees Cook , Keith Packard , Linus Walleij , Nick Desaulniers , Tony Lindgren Subject: [PATCH v2 04/12] ARM: iop32x: use GENERIC_IRQ_MULTI_HANDLER Date: Tue, 30 Nov 2021 13:58:53 +0100 Message-Id: <20211130125901.3054-5-ardb@kernel.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20211130125901.3054-1-ardb@kernel.org> References: <20211130125901.3054-1-ardb@kernel.org> MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=6275; i=ardb@kernel.org; h=from:subject; bh=nXEHFRupO2/kJ/PkxpV6bQSQyjdJ60QtEFuCcah/+iU=; b=owEB7QES/pANAwAKAcNPIjmS2Y8kAcsmYgBhpiALQJ5NTi+/O0tj00isR14CMpajoCPtTFts5nn1 BHyCdVWJAbMEAAEKAB0WIQT72WJ8QGnJQhU3VynDTyI5ktmPJAUCYaYgCwAKCRDDTyI5ktmPJLuYC/ 96Av5lWZ/5FASvONX28Oi5yArpAWiFBBS26Y/6fPDGgqRdwwvKP8McernHhIkNSIyhcunc9Sa9xA+e pdFAGUv3Ohd7CpAHROHLi0PvddS7c4jQ13/glxLqq/JWIknL56RDN4RC607b/aU5h24B3gBzpJAU56 u2CGfhTKIB6e9Y+2zU1y36x6tk6l6oGNkQkBr5k9hMISKPZUXovT8mD0MIvTuyC+AQZ2sVJt7BHD4R q9zm0K0hTrx8LbYERUX1X0MhLugVkJyBgYsONsoRi2uKZ8tirJbMhR0u9s+ee0yoZiXrPZQRQxg0Al 3Ia5Uj4D8qZJwr+Ktry/9sTeq7cpBrSzNgMpv85h+m75NDdfaxX9aXRTzMiVpBlVXHTjBxAGEx3nO9 OjniYym6CTCUeafZ6gvscjzDyTBNC/DcfeuYYi5uWIZxmnjFvsJsw3OngF3q/uM/qAxu5DQZngHecI nM9Hc6+PKp4S57G2Evs3xfqume27AFM1rQjD392f7LtoY= X-Developer-Key: i=ardb@kernel.org; a=openpgp; fpr=F43D03328115A198C90016883D200E9CA6329909 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211130_045924_628797_52CDE087 X-CRM114-Status: GOOD ( 27.00 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Arnd Bergmann iop32x uses the entry-macro.S file for both the IRQ entry and for hooking into the arch_ret_to_user code path. This is done because the cp6 registers have to be enabled before accessing any of the interrupt controller registers but have to be disabled when running in user space. There is also a lazy-enable logic in cp6.c, but during a hardirq, we know it has to be enabled. Both the cp6-enable code and the code to read the IRQ status can be lifted into the normal generic_handle_arch_irq() path, but the cp6-disable code has to remain in the user return code. As nothing other than iop32x uses this hook, just open-code it there with an ifdef for the platform that can eventually be removed when iop32x has reached the end of its life. The cp6-enable path in the IRQ entry has an extra cp_wait barrier that the trap version does not have, but it is harmless to do it in both cases to simplify the logic here at the cost of a few extra cycles for the trap. I'm leaving the logic completely unchanged, including the way this platform starts its IRQs at zero, but add a note that this can cause problems. Signed-off-by: Arnd Bergmann Signed-off-by: Ard Biesheuvel --- arch/arm/Kconfig | 5 +--- arch/arm/kernel/entry-common.S | 10 ++++--- arch/arm/mach-iop32x/cp6.c | 10 ++++++- arch/arm/mach-iop32x/include/mach/entry-macro.S | 31 -------------------- arch/arm/mach-iop32x/iop3xx.h | 1 + arch/arm/mach-iop32x/irq.c | 23 +++++++++++++++ 6 files changed, 40 insertions(+), 40 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index a0cc9ca66ae0..d9ba6961b295 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -227,9 +227,6 @@ config GENERIC_ISA_DMA config FIQ bool -config NEED_RET_TO_USER - bool - config ARCH_MTD_XIP bool @@ -371,9 +368,9 @@ config ARCH_IOP32X bool "IOP32x-based" depends on MMU select CPU_XSCALE + select GENERIC_IRQ_MULTI_HANDLER select GPIO_IOP select GPIOLIB - select NEED_RET_TO_USER select FORCE_PCI select PLAT_IOP help diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S index ac86c34682bb..67a89e598f9e 100644 --- a/arch/arm/kernel/entry-common.S +++ b/arch/arm/kernel/entry-common.S @@ -16,12 +16,14 @@ .equ NR_syscalls, __NR_syscalls -#ifdef CONFIG_NEED_RET_TO_USER -#include -#else .macro arch_ret_to_user, tmp1, tmp2 - .endm +#ifdef CONFIG_ARCH_IOP32X + mrc p15, 0, \tmp1, c15, c1, 0 + ands \tmp2, \tmp1, #(1 << 6) + bicne \tmp1, \tmp1, #(1 << 6) + mcrne p15, 0, \tmp1, c15, c1, 0 @ Disable cp6 access #endif + .endm #include "entry-header.S" diff --git a/arch/arm/mach-iop32x/cp6.c b/arch/arm/mach-iop32x/cp6.c index ec74b07fb7e3..095f84673ccc 100644 --- a/arch/arm/mach-iop32x/cp6.c +++ b/arch/arm/mach-iop32x/cp6.c @@ -7,7 +7,7 @@ #include #include -static int cp6_trap(struct pt_regs *regs, unsigned int instr) +void iop_enable_cp6(void) { u32 temp; @@ -16,7 +16,15 @@ static int cp6_trap(struct pt_regs *regs, unsigned int instr) "mrc p15, 0, %0, c15, c1, 0\n\t" "orr %0, %0, #(1 << 6)\n\t" "mcr p15, 0, %0, c15, c1, 0\n\t" + "mrc p15, 0, %0, c15, c1, 0\n\t" + "mov %0, %0\n\t" + "sub pc, pc, #4 @ cp_wait\n\t" : "=r"(temp)); +} + +static int cp6_trap(struct pt_regs *regs, unsigned int instr) +{ + iop_enable_cp6(); return 0; } diff --git a/arch/arm/mach-iop32x/include/mach/entry-macro.S b/arch/arm/mach-iop32x/include/mach/entry-macro.S deleted file mode 100644 index 341e5d9a6616..000000000000 --- a/arch/arm/mach-iop32x/include/mach/entry-macro.S +++ /dev/null @@ -1,31 +0,0 @@ -/* - * arch/arm/mach-iop32x/include/mach/entry-macro.S - * - * Low-level IRQ helper macros for IOP32x-based platforms - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - .macro get_irqnr_preamble, base, tmp - mrc p15, 0, \tmp, c15, c1, 0 - orr \tmp, \tmp, #(1 << 6) - mcr p15, 0, \tmp, c15, c1, 0 @ Enable cp6 access - mrc p15, 0, \tmp, c15, c1, 0 - mov \tmp, \tmp - sub pc, pc, #4 @ cp_wait - .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - mrc p6, 0, \irqstat, c8, c0, 0 @ Read IINTSRC - cmp \irqstat, #0 - clzne \irqnr, \irqstat - rsbne \irqnr, \irqnr, #32 - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - mrc p15, 0, \tmp1, c15, c1, 0 - ands \tmp2, \tmp1, #(1 << 6) - bicne \tmp1, \tmp1, #(1 << 6) - mcrne p15, 0, \tmp1, c15, c1, 0 @ Disable cp6 access - .endm diff --git a/arch/arm/mach-iop32x/iop3xx.h b/arch/arm/mach-iop32x/iop3xx.h index 46b4b34a4ad2..a6ec7ebadb35 100644 --- a/arch/arm/mach-iop32x/iop3xx.h +++ b/arch/arm/mach-iop32x/iop3xx.h @@ -225,6 +225,7 @@ extern int iop3xx_get_init_atu(void); #include void iop3xx_map_io(void); +void iop_enable_cp6(void); void iop_init_cp6_handler(void); void iop_init_time(unsigned long tickrate); void iop3xx_restart(enum reboot_mode, const char *); diff --git a/arch/arm/mach-iop32x/irq.c b/arch/arm/mach-iop32x/irq.c index 2d48bf1398c1..9d6f7ed45ada 100644 --- a/arch/arm/mach-iop32x/irq.c +++ b/arch/arm/mach-iop32x/irq.c @@ -29,6 +29,15 @@ static void intstr_write(u32 val) asm volatile("mcr p6, 0, %0, c4, c0, 0" : : "r" (val)); } +static u32 iintsrc_read(void) +{ + int irq; + + asm volatile("mrc p6, 0, %0, c8, c0, 0" : "=r" (irq)); + + return irq; +} + static void iop32x_irq_mask(struct irq_data *d) { @@ -50,11 +59,25 @@ struct irq_chip ext_chip = { .irq_unmask = iop32x_irq_unmask, }; +void iop_handle_irq(struct pt_regs *regs) +{ + u32 mask; + + iop_enable_cp6(); + + do { + mask = iintsrc_read(); + if (mask) + generic_handle_irq(fls(mask)); + } while (mask); +} + void __init iop32x_init_irq(void) { int i; iop_init_cp6_handler(); + set_handle_irq(iop_handle_irq); intctl_write(0); intstr_write(0); -- 2.30.2 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel