From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DE1C1C433F5 for ; Mon, 6 Dec 2021 17:00:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=CXdNGhnM8NvcZGQAs2rSLQWFw/SJCyxNKnBDdAebe/4=; b=GXzeQvP2xVI5vs g3iE8e6vqT/IxgqeDjEc2M9rw77XJMaIzQPN2ofT0GsJ0qzisn2cgRecZBGJY0wEZsqqGE+2kVxde 2E1joM9+uWh2dNqgosCOTuwIhpSH1e33irfiwGxRxwsvG5Cs6FsOdSLggYaVUrIyyWXXJdrMHBhjG F+OjLQ0pZwbgOjJf33ZXuXgrqBB4/7O5JLo+5U8ixfmGqH0U173k7gQUg+ab6RaKAf9erJ8lkI0YV KsPu3k+lrDpLOf7z/9/3HMPlxNxQbCAq6ufsAunAzJYGTbg3FMe3xIRD9vrtID4Vu1dIAppAaaTIK e8qoZ9fFnixBXErXdelg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1muHIe-004ui3-LQ; Mon, 06 Dec 2021 16:57:14 +0000 Received: from ams.source.kernel.org ([2604:1380:4601:e00::1]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1muH9l-004qqv-A5 for linux-arm-kernel@lists.infradead.org; Mon, 06 Dec 2021 16:48:03 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 09622B81178; Mon, 6 Dec 2021 16:48:00 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 2FA73C341C6; Mon, 6 Dec 2021 16:47:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1638809278; bh=nay7UY6z6/iVftn+ZAxf4c8jV6E2rdC+8m18H6RErrw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=CDPCDQNtnAJL86lneuV9fYcuRP+QGuBVtxUpKheTaGTVM9wmTRgxQh/C4wFBiG0aE 0KROGbcyBsatlfIsP1fpHaR4l7JLdXH/mj20Hi/vY16jZZVwxSw8fvXH0vEkWKxjny AC4/V9Cc62bMfgCgGQEVjIkB50MoTw41JxCjQlbXLMHWuEvqLXcz3gyy9U8ZsHQ76U UMIzlNMe3qi3FAOR4keTKhx26zA970dxdf8rDIuYQxNkEcVfMoIYSD/fdOMiLxDOco jlYjVGk6Zb26G3H8PScad5b0kKM9pkqxDD3KRn1cR0XxT4SvCYKKGirV4Wj/3RF9MW FbuZfUE8iuDnw== From: Ard Biesheuvel To: linux-arm-kernel@lists.infradead.org, linux@armlinux.org.uk Cc: Ard Biesheuvel , Nicolas Pitre , Arnd Bergmann , Kees Cook , Keith Packard , Linus Walleij , Nick Desaulniers , Tony Lindgren , Marc Zyngier , Vladimir Murzin , Jesse Taube Subject: [PATCH v4 13/15] ARM: smp: defer TPIDRURO update for SMP v6 configurations too Date: Mon, 6 Dec 2021 17:46:57 +0100 Message-Id: <20211206164659.1495084-14-ardb@kernel.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20211206164659.1495084-1-ardb@kernel.org> References: <20211206164659.1495084-1-ardb@kernel.org> MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=3249; h=from:subject; bh=nay7UY6z6/iVftn+ZAxf4c8jV6E2rdC+8m18H6RErrw=; b=owEB7QES/pANAwAKAcNPIjmS2Y8kAcsmYgBhrj5+BiAEnUFyl8BvN4cKRCJaOcHvc5md+BRJwrRt vhVuSfmJAbMEAAEKAB0WIQT72WJ8QGnJQhU3VynDTyI5ktmPJAUCYa4+fgAKCRDDTyI5ktmPJB7WDA CkCtzO9SGS9YdFOOMVS6otR3dGGXJK/a3VH0gFsh7IqJAxciCOyBHoouoMYkLZ9/f+yhPuvlB4KFxy B15aXgJVwtz9eVlH/y+rAyG8OxOQ8lU/yvXmsM9zFAq1fdxB5X1o/JwVn5T87CzPBZ52yYNZ0huhrN x3gXE1GqR7iCj5BbRK2DCIPxBdhuIXltWKe2NqM7JVI55O292JoO+qMc19sDlKXQbSXsPKeQym0MSL CHpHgVPkaq/G20/rejL8F9Gt/3BdSbYJDyl5hPjyLWVdNYXGlsgtr5qR2RlkwCyiiffyb825ISdr59 zoyq1fo2+zELGgY+bZD8Vn6ppsoeAMRd7Md58R/ZxjWoUGm3S+2s907/Qd7K3nUuoi0eUFgFByWG1y jFhlW3b6qFQ5SW2vIsBFeWrxtISuYnvFWHhISEfJ/i+elRyh9w2dtPUxe8Oa1YxkbMYgUUabHgKATM TrVCkWbNLNakMsrp4MiFnCG/YcnppeEDTH56DFQX9OiuA= X-Developer-Key: i=ardb@kernel.org; a=openpgp; fpr=F43D03328115A198C90016883D200E9CA6329909 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211206_084801_698309_26FEB90E X-CRM114-Status: GOOD ( 16.59 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Defer TPIDURO updates for user space until exit also for CPU_V6+SMP configurations so that we can decide at runtime whether to use it to carry the current pointer, provided that we are running on a CPU that actually implements this register. This is needed for THREAD_INFO_IN_TASK support for UP systems, which requires that all SMP capable systems use the TPIDRURO based access to 'current' as the only remaining alternative will be a global variable which only works on UP. Acked-by: Linus Walleij Acked-by: Nicolas Pitre Signed-off-by: Ard Biesheuvel Tested-by: Marc Zyngier Tested-by: Vladimir Murzin # ARMv7M --- arch/arm/include/asm/tls.h | 13 +++++++------ arch/arm/kernel/entry-header.S | 11 ++++++++++- 2 files changed, 17 insertions(+), 7 deletions(-) diff --git a/arch/arm/include/asm/tls.h b/arch/arm/include/asm/tls.h index c3296499176c..d712c170c095 100644 --- a/arch/arm/include/asm/tls.h +++ b/arch/arm/include/asm/tls.h @@ -18,13 +18,14 @@ .endm .macro switch_tls_v6, base, tp, tpuser, tmp1, tmp2 - ldr \tmp1, =elf_hwcap - ldr \tmp1, [\tmp1, #0] + ldr_va \tmp1, elf_hwcap mov \tmp2, #0xffff0fff tst \tmp1, #HWCAP_TLS @ hardware TLS available? streq \tp, [\tmp2, #-15] @ set TLS value at 0xffff0ff0 mrcne p15, 0, \tmp2, c13, c0, 2 @ get the user r/w register +#ifndef CONFIG_SMP mcrne p15, 0, \tp, c13, c0, 3 @ yes, set TLS register +#endif mcrne p15, 0, \tpuser, c13, c0, 2 @ set user r/w register strne \tmp2, [\base, #TI_TP_VALUE + 4] @ save it .endm @@ -43,7 +44,7 @@ #elif defined(CONFIG_CPU_V6) #define tls_emu 0 #define has_tls_reg (elf_hwcap & HWCAP_TLS) -#define defer_tls_reg_update 0 +#define defer_tls_reg_update IS_ENABLED(CONFIG_SMP) #define switch_tls switch_tls_v6 #elif defined(CONFIG_CPU_32v6K) #define tls_emu 0 @@ -81,11 +82,11 @@ static inline void set_tls(unsigned long val) */ barrier(); - if (!tls_emu && !defer_tls_reg_update) { - if (has_tls_reg) { + if (!tls_emu) { + if (has_tls_reg && !defer_tls_reg_update) { asm("mcr p15, 0, %0, c13, c0, 3" : : "r" (val)); - } else { + } else if (!has_tls_reg) { #ifdef CONFIG_KUSER_HELPERS /* * User space must never try to access this diff --git a/arch/arm/kernel/entry-header.S b/arch/arm/kernel/entry-header.S index 268f7f4c5c05..cb82ff5adec1 100644 --- a/arch/arm/kernel/entry-header.S +++ b/arch/arm/kernel/entry-header.S @@ -292,12 +292,21 @@ .macro restore_user_regs, fast = 0, offset = 0 -#if defined(CONFIG_CPU_32v6K) && !defined(CONFIG_CPU_V6) +#if defined(CONFIG_CPU_32v6K) || defined(CONFIG_SMP) +#if defined(CONFIG_CPU_V6) && defined(CONFIG_SMP) +ALT_SMP(b .L1_\@ ) +ALT_UP( nop ) + ldr_va r1, elf_hwcap + tst r1, #HWCAP_TLS @ hardware TLS available? + beq .L2_\@ +.L1_\@: +#endif @ The TLS register update is deferred until return to user space so we @ can use it for other things while running in the kernel get_thread_info r1 ldr r1, [r1, #TI_TP_VALUE] mcr p15, 0, r1, c13, c0, 3 @ set TLS register +.L2_\@: #endif uaccess_enable r1, isb=0 -- 2.30.2 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel