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charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, Dec 14, 2021 at 03:28:40PM +0100, Thierry Reding wrote: > On Tue, Dec 14, 2021 at 12:33:53PM +0000, Will Deacon wrote: > > On Wed, Dec 08, 2021 at 03:36:02PM +0100, Thierry Reding wrote: > > > On Tue, Dec 07, 2021 at 04:03:25PM +0000, Mark Rutland wrote: > > > > On Tue, Dec 07, 2021 at 04:07:45PM +0100, Thierry Reding wrote: > > > > > From: Thierry Reding > > > > > > > > > > Add support for the NVIDIA Denver and Carmel PMUs using the generic > > > > > PMUv3 event map for now. > > > > > > > > > > Signed-off-by: Thierry Reding > > > > > --- > > > > > arch/arm64/kernel/perf_event.c | 14 ++++++++++++++ > > > > > 1 file changed, 14 insertions(+) > > > > > > > > > > diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c > > > > > index b4044469527e..8c8cf369c450 100644 > > > > > --- a/arch/arm64/kernel/perf_event.c > > > > > +++ b/arch/arm64/kernel/perf_event.c > > > > > @@ -1247,6 +1247,18 @@ static int armv8_vulcan_pmu_init(struct arm_pmu *cpu_pmu) > > > > > armv8_vulcan_map_event); > > > > > } > > > > > > > > > > +static int armv8_denver_pmu_init(struct arm_pmu *cpu_pmu) > > > > > +{ > > > > > + return armv8_pmu_init_nogroups(cpu_pmu, "armv8_nvidia_denver", > > > > > + armv8_pmuv3_map_event); > > > > > +} > > > > > + > > > > > +static int armv8_carmel_pmu_init(struct arm_pmu *cpu_pmu) > > > > > +{ > > > > > + return armv8_pmu_init_nogroups(cpu_pmu, "armv8_nvidia_carmel", > > > > > + armv8_pmuv3_map_event); > > > > > +} > > > > > + > > > > > static const struct of_device_id armv8_pmu_of_device_ids[] = { > > > > > {.compatible = "arm,armv8-pmuv3", .data = armv8_pmuv3_init}, > > > > > {.compatible = "arm,cortex-a34-pmu", .data = armv8_a34_pmu_init}, > > > > > @@ -1265,6 +1277,8 @@ static const struct of_device_id armv8_pmu_of_device_ids[] = { > > > > > {.compatible = "arm,neoverse-n1-pmu", .data = armv8_n1_pmu_init}, > > > > > {.compatible = "cavium,thunder-pmu", .data = armv8_thunder_pmu_init}, > > > > > {.compatible = "brcm,vulcan-pmu", .data = armv8_vulcan_pmu_init}, > > > > > + {.compatible = "nvidia,denver-pmu", .data = armv8_denver_pmu_init}, > > > > > + {.compatible = "nvidia,carmel-pmu", .data = armv8_carmel_pmu_init}, > > > > > > > > Super trivial nit, but could we please organise this alphabetically (i.e. with carmel first?) > > > > > > > > With that: > > > > > > > > Acked-by: Mark Rutland > > > > > > > > I see now that we messed up the order of "cavium,thunder-pmu" and > > > > "brcm,vulcan-pmu", but otherwise this is ordered, and it's be nice to keep it > > > > that way. I can fix the order of those two in a separate patch. > > > > > > I ordered this chronologically (Denver for Tegra186 and Carmel for > > > Tegra194), which seemed a bit more natural, but I can reorder this > > > alphabetically if you prefer. > > > > > > Would Will be the right person to pick this up or should I take it > > > through the Tegra tree and then ARM SoC? > > > > Sorry, I missed this somehow. I've got some perf patches pending already, so > > it would be easiest for me to take this one directly (and then I can apply > > Robin's stuff on top). Is that ok? > > Sure, works for me. Do you still want me to address Mark's comment > regarding the sorting order (chronological vs. alphabetical)? It wasn't > clear to me if Mark still wanted that after my explanation. No need -- Robin's picked this into his series: https://lore.kernel.org/r/5f0f69d47acca78a9e479501aa4d8b429e23cf11.1639490264.git.robin.murphy@arm.com so now I just need to pick that lot up. Thanks! Will _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel