From: Nathan Chancellor <nathan@kernel.org>
To: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Sasha Levin <sashal@kernel.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>,
Marc Zyngier <maz@kernel.org>,
Nick Desaulniers <ndesaulniers@google.com>,
linux-arm-kernel@lists.infradead.org, stable@vger.kernel.org,
llvm@lists.linux.dev
Subject: [PATCH RFC 4.9 3/5] arm64: reduce el2_setup branching
Date: Fri, 7 Jan 2022 12:43:33 -0700 [thread overview]
Message-ID: <20220107194335.3090066-4-nathan@kernel.org> (raw)
In-Reply-To: <20220107194335.3090066-1-nathan@kernel.org>
From: Mark Rutland <mark.rutland@arm.com>
commit 3ad47d055aa88d9f4189253f5b5c485f4c4626b2 upstream.
The early el2_setup code is a little convoluted, with two branches where
one would do. This makes the code more painful to read than is
necessary.
We can remove a branch and simplify the logic by moving the early return
in the booted-at-EL1 case earlier in the function. This separates it
from all the setup logic that only makes sense for EL2.
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Nathan Chancellor <nathan@kernel.org>
---
arch/arm64/kernel/head.S | 15 +++++++--------
1 file changed, 7 insertions(+), 8 deletions(-)
diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S
index 387542383662..b15abc6ae4af 100644
--- a/arch/arm64/kernel/head.S
+++ b/arch/arm64/kernel/head.S
@@ -489,13 +489,8 @@ ENTRY(el2_setup)
msr SPsel, #1 // We want to use SP_EL{1,2}
mrs x0, CurrentEL
cmp x0, #CurrentEL_EL2
- b.ne 1f
- mrs x0, sctlr_el2
-CPU_BE( orr x0, x0, #(1 << 25) ) // Set the EE bit for EL2
-CPU_LE( bic x0, x0, #(1 << 25) ) // Clear the EE bit for EL2
- msr sctlr_el2, x0
- b 2f
-1: mrs x0, sctlr_el1
+ b.eq 1f
+ mrs x0, sctlr_el1
CPU_BE( orr x0, x0, #(3 << 24) ) // Set the EE and E0E bits for EL1
CPU_LE( bic x0, x0, #(3 << 24) ) // Clear the EE and E0E bits for EL1
msr sctlr_el1, x0
@@ -503,7 +498,11 @@ CPU_LE( bic x0, x0, #(3 << 24) ) // Clear the EE and E0E bits for EL1
isb
ret
-2:
+1: mrs x0, sctlr_el2
+CPU_BE( orr x0, x0, #(1 << 25) ) // Set the EE bit for EL2
+CPU_LE( bic x0, x0, #(1 << 25) ) // Clear the EE bit for EL2
+ msr sctlr_el2, x0
+
#ifdef CONFIG_ARM64_VHE
/*
* Check for VHE being present. For the rest of the EL2 setup,
--
2.34.1
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next prev parent reply other threads:[~2022-01-07 19:45 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-07 19:43 [PATCH RFC 4.9 0/5] Fix booting arm64 big endian with QEMU 5.0.0+ Nathan Chancellor
2022-01-07 19:43 ` [PATCH RFC 4.9 1/5] bug: split BUILD_BUG stuff out into <linux/build_bug.h> Nathan Chancellor
2022-01-07 19:43 ` [PATCH RFC 4.9 2/5] arm64: Remove a redundancy in sysreg.h Nathan Chancellor
2022-01-09 13:07 ` Patch "arm64: Remove a redundancy in sysreg.h" has been added to the 4.9-stable tree gregkh
2022-01-07 19:43 ` Nathan Chancellor [this message]
2022-01-09 13:07 ` Patch "arm64: reduce el2_setup branching" " gregkh
2022-01-07 19:43 ` [PATCH RFC 4.9 4/5] arm64: move !VHE work to end of el2_setup Nathan Chancellor
2022-01-09 13:07 ` Patch "arm64: move !VHE work to end of el2_setup" has been added to the 4.9-stable tree gregkh
2022-01-07 19:43 ` [PATCH RFC 4.9 5/5] arm64: sysreg: Move to use definitions for all the SCTLR bits Nathan Chancellor
2022-01-09 13:07 ` Patch "arm64: sysreg: Move to use definitions for all the SCTLR bits" has been added to the 4.9-stable tree gregkh
2022-01-09 12:58 ` [PATCH RFC 4.9 0/5] Fix booting arm64 big endian with QEMU 5.0.0+ Greg Kroah-Hartman
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