From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 303C0C433F5 for ; Tue, 11 Jan 2022 13:09:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=tDzddiTkHfvNC7LW4suToZzNVHjtp+QGaYgNl3IGcgY=; b=1k59HLO58z5VVX LJfVfmf0XfICvF3E1EDBR2KG4v/72RdPhMPN3oVuDcKu15i8riEdqoclUnl/HenwG83l3FRTJ4cz6 6vTzPMdwyj2U0DKDHweax82z1hxrh43hSVrVn5cOgHsxRAbqPjgPrNNIS+jZLfHnmIo+2H1XxfWWf spXs1jc/1WamqrBYC7uMqBaV7KfKU3TBGD4aMiFTCjDba1qq20po4dmmfbNEBPnxg3I+I0VOV9dz8 FxJRN6Jl+snagQxp+lLUnU5cODYW2tmNhS4fz+AFrA/NsuwObGb3EvuIXz7ejQf13aVbbOUeFaDA0 S/KaoI/LKc1VnMO7VaMg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1n7GsK-00GITv-Q8; Tue, 11 Jan 2022 13:07:44 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1n7Grl-00GIDK-3u for linux-arm-kernel@lists.infradead.org; Tue, 11 Jan 2022 13:07:12 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 242B61FB; Tue, 11 Jan 2022 05:07:08 -0800 (PST) Received: from lakrids.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.121.207.14]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 5874A3F774; Tue, 11 Jan 2022 05:07:07 -0800 (PST) From: Mark Rutland To: linux-arm-kernel@lists.infradead.org Cc: andre.przywara@arm.com, Jaxson.Han@arm.com, mark.rutland@arm.com, Wei.Chen@arm.com Subject: [bootwrapper PATCH 02/13] Add bit-field macros Date: Tue, 11 Jan 2022 13:06:42 +0000 Message-Id: <20220111130653.2331827-3-mark.rutland@arm.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220111130653.2331827-1-mark.rutland@arm.com> References: <20220111130653.2331827-1-mark.rutland@arm.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220111_050709_235478_4AD2E482 X-CRM114-Status: GOOD ( 12.40 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Arm architectural documentation typically defines bit-fields as `[msb,lsb]` and single-bit fields as `[bit]`. For clarity it would be helpful if we could define fields in the same way. Add helpers so that we can do so, along with helper to extract/insert bit-field values. There should be no functional change as a result of this patch. Signed-off-by: Mark Rutland --- include/bits.h | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) create mode 100644 include/bits.h diff --git a/include/bits.h b/include/bits.h new file mode 100644 index 0000000..8824a38 --- /dev/null +++ b/include/bits.h @@ -0,0 +1,33 @@ +/* + * include/bits.h - helpers for bit-field definitions. + * + * Copyright (C) 2021 ARM Limited. All rights reserved. + * + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE.txt file. + */ +#ifndef __BITS_H +#define __BITS_H + +#ifdef __ASSEMBLY__ +#define UL(x) x +#define ULL(x) x +#else +#define UL(x) x##UL +#define ULL(x) x##ULL +#endif + +#define BITS(msb, lsb) \ +((~ULL(0) >> (63 - msb)) & (~ULL(0) << lsb)) + +#define BIT(b) BITS(b, b) + +#define BITS_LSB(bits) (__builtin_ffsll(bits) - 1) + +#define BITS_EXTRACT(val, bits) \ + (((val) & (bits)) >> BITS_LSB(bits)) + +#define BITS_INSERT(bits, val) \ + (((val) << BITS_LSB(bits)) & (bits)) + +#endif -- 2.30.2 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel