From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 62CA7C433F5 for ; Tue, 11 Jan 2022 14:43:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=RMa9+Ue9yXHfuHLHy5XK9sFDSOEzSeKHINBSQII5xxo=; b=bT9viPgAvNRRty 0NL9HDL/upEqE3Mts19VMHA7/a8+AuLOWbR9/wTszGNH1bqG0D2cpQ08OAF625qB5aWKDHCF3KBuX g1LFy5Pwn1tuHh/5t2r/Y9TBSRSVx2XaEth3BOmOPM5PUIA2slyw+Zn0VGAU3fuvy/Bj8vkbc8FPY X77V8BgmvrvfTfvid1bBmUbshDThb0HNu8BBB5mSWXtYZXkdMjh5pEn5prTxXkIwjtnNQoFjRuzu4 9HAgpnMEC7mrkyjJDAMc1qdhyPUNf+Hfn+5Yx6tvGGU6EBEbTbLSdKAJhuYbuEt41DKjlVRrkdcd7 xXoVuvLPP/vj49iane2A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1n7ILW-00GaZy-73; Tue, 11 Jan 2022 14:41:58 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1n7ILR-00GaYd-8M for linux-arm-kernel@lists.infradead.org; Tue, 11 Jan 2022 14:41:55 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id EFA7C1FB; Tue, 11 Jan 2022 06:41:51 -0800 (PST) Received: from donnerap.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.121.207.14]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 4AC303F774; Tue, 11 Jan 2022 06:41:51 -0800 (PST) Date: Tue, 11 Jan 2022 14:41:49 +0000 From: Andre Przywara To: Mark Rutland Cc: linux-arm-kernel@lists.infradead.org, Jaxson.Han@arm.com, Wei.Chen@arm.com Subject: Re: [bootwrapper PATCH 05/13] aarch64: add mov_64 macro Message-ID: <20220111144149.6b519ede@donnerap.cambridge.arm.com> In-Reply-To: <20220111130653.2331827-6-mark.rutland@arm.com> References: <20220111130653.2331827-1-mark.rutland@arm.com> <20220111130653.2331827-6-mark.rutland@arm.com> Organization: ARM X-Mailer: Claws Mail 3.17.5 (GTK+ 2.24.32; aarch64-unknown-linux-gnu) MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220111_064153_381732_D7CC43E2 X-CRM114-Status: GOOD ( 20.05 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, 11 Jan 2022 13:06:45 +0000 Mark Rutland wrote: Hi, > In subsequent patches we'll need to load 64-bit values into GPRs before > the CPU is in a known endianness, where we cannot use literal pools. > > In preparation for that, this patch adds a new `mov_64` macro to load a > 64-bit value into a GPR using a sequence of MOV and MOVKs, which will > function the same regardless of the CPU's endianness. > > At the same time, move the `cpuid` macro to use `mov_64` internally. > > Signed-off-by: Mark Rutland > --- > arch/aarch64/common.S | 10 +++++++++- > 1 file changed, 9 insertions(+), 1 deletion(-) > > diff --git a/arch/aarch64/common.S b/arch/aarch64/common.S > index c7171a9..3279fa9 100644 > --- a/arch/aarch64/common.S > +++ b/arch/aarch64/common.S > @@ -9,9 +9,17 @@ > > #include > > + /* Load a 64-bit value using immediates */ > + .macro mov_64 dest, val > + mov \dest, #(((\val) >> 0) & 0xffff) > + movk \dest, #(((\val) >> 16) & 0xffff), lsl #16 > + movk \dest, #(((\val) >> 32) & 0xffff), lsl #32 > + movk \dest, #(((\val) >> 48) & 0xffff), lsl #48 > + .endm > + Trusted Firmware has an (admittedly more complicated) version that only uses as many instructions as needed, by skipping over halfwords that are zero: https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git/tree/include/arch/aarch64/asm_macros.S#n125 Does that sound useful for us? Cheers, Andre > /* Put MPIDR into \dest, clobber \tmp and flags */ > .macro cpuid dest, tmp > mrs \dest, mpidr_el1 > - ldr \tmp, =MPIDR_ID_BITS > + mov_64 \tmp, MPIDR_ID_BITS > ands \dest, \dest, \tmp > .endm _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel