From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 33F2EC433EF for ; Tue, 18 Jan 2022 10:08:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Zb/wi7sljLZ47SpKeqNKroKuFIwNY7lEn560RW7fI5I=; b=JU1jNNMF/MjHPk DCPLtNNmnTHcQ5t9LRf8r+xuVqU5hQY3hFWZyB1ObZxQ5GRWPYr6YJ+iDIUwKE+ZUdDMeVIKXQMOi 9XIrb65yDzEMh68avHGt2hItXxFPjt4s5sci+EYak41NUlnR9+7tASv6f4CTk276KWXJDFP1+2oBm bOf2KXjmgHuaX7cXQPQmCRsoLNP7HsP9DL8N85KHY1JMxhjNrzYrMIuU5/mie5lv9wQ+gpWUy3g1L K5prbxMSW3cSR+Xwr13e7mLobfhLvKaS6avLr6samSxtI9pLqCKeZMxUVxHftbswiU/x7tg+cHjrj cUtcNLDLPqg+igIrgidg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1n9lOT-0015jm-JB; Tue, 18 Jan 2022 10:07:13 +0000 Received: from ams.source.kernel.org ([2604:1380:4601:e00::1]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1n9lOP-0015j1-Ru for linux-arm-kernel@lists.infradead.org; Tue, 18 Jan 2022 10:07:11 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 4A88BB81247; Tue, 18 Jan 2022 10:07:08 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id D5931C00446; Tue, 18 Jan 2022 10:07:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1642500427; bh=LtGI7ReI1VAbLJR+tqn3W9qAVWXu25LmWPuXFerZXhI=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=hg9Z5PRj0PLyaAfZcZ0nd+RtrzHE3w1vkMa0by9aVLjd6SwARimg+IUMbRee82B2N np7ybr4YgzC1p2EpKJY1Wr3ODdXmJHnXLr8BAL6lU3+pJCjSeXGReJ4xztXjn7s060 spfUotA4H38aFS/1tTrJ4B7JYUbbfI52ofw5hiCrGYTpCWJ2Mn+cHtdkbqBSoWzAvr 55qljGPlUGFYdWByjOKRoQ7E49jEyjnvUu61E7QPnAw+YcQLh4JtLic25I2/o4BXre Db84KAfITczL+QsH6aiqcN0S4B+BWGloJZaqOpmbxbOmNox3SihDkK3EV7XUSfitfQ 29KDcQrXVSk9A== Date: Tue, 18 Jan 2022 10:07:02 +0000 From: Will Deacon To: German Gomez Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, mark.rutland@arm.com, james.clark@arm.com, leo.yan@linaro.org Subject: Re: [RFC PATCH 1/2] perf: arm_spe: Fix consistency of PMSCR register bit CX Message-ID: <20220118100702.GB16547@willie-the-truck> References: <20220117124432.3119132-1-german.gomez@arm.com> <20220117124432.3119132-2-german.gomez@arm.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20220117124432.3119132-2-german.gomez@arm.com> User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220118_020710_217223_7450B881 X-CRM114-Status: GOOD ( 25.00 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, Jan 17, 2022 at 12:44:31PM +0000, German Gomez wrote: > The arm_spe_pmu driver will enable the CX bit of the PMSCR register in > order to add CONTEXT packets into the traces if the owner of the perf > event runs with capabilities CAP_PERFMON or CAP_SYS_ADMIN. > > The value of the bit is computed in the arm_spe_event_to_pmscr function > [1], and the check for capabilities happens in [2] in the pmu init > callback. This suggests that the value of the CX bit should remain > consistent for the duration of the perf session. > > However, the function arm_spe_event_to_pmscr may be called later during > the start callback [3] when the "current" process is not the owner of > the perf session, so the CX bit is currently not consistent. Consider > the following example: > > 1. Run a process in the background with capability CAP_SYS_ADMIN in CPU0. > > $ taskset --cpu-list 0 sudo dd if=/dev/random of=/dev/null & > [3] 3806 > > 2. Begin a perf session _without_ capabilities (we shouldn't see CONTEXT packets). > > $ perf record -e arm_spe_0// -C0 -- sleep 1 > $ perf report -D | grep CONTEXT > . 0000000e: 65 df 0e 00 00 CONTEXT 0xedf el2 > . 0000004e: 65 df 0e 00 00 CONTEXT 0xedf el2 > . 0000008e: 65 df 0e 00 00 CONTEXT 0xedf el2 > [...] > > As can be seen, the traces begin showing CONTEXT packets when the pid is > 0xedf (3807). So to be clear: we shouldn't be reporting these packets because 'perf' doesn't have the right capabilities, but we evaluate that in the context of 'dd' (running as root) and so incorrectly grant the permission. Correct? > This happens because the pmu start callback is run when > the current process is not the owner of the perf session, so the CX > register bit is set. This doesn't really seem SPE-specific to me -- the perf_allow_*() helpers also operate implicitly on the current task. How do other PMU drivers avoid falling into this trap? > One way to fix this is by caching the value of the CX bit during the > initialization of the PMU event, so that it remains consistent for the > duration of the session. It doesn't feel right to stash this in 'struct arm_spe_pmu' during event initialisation -- wouldn't that allow perf to continue creating new events with CX set, even if the paranoid sysctl was changed dynamically? Instead, I think it would be better if the capabilities were stash in the event itself somehow at initialisation time. Will _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel