From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 19FBBC433EF for ; Wed, 19 Jan 2022 09:31:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=LVFLqaGW7tQsXWHmZp8Bjgh5aHf9/fCfob0YlqQ59QI=; b=XxdAlhK/aLZgYO NYQzPnG8VGP6gn+dq9JvjT4c6NKkl1z/ZiWJt5x+FHz5BaT2A2SoaCjc8qXTI3mFNovDVz1hT2Afb rxC8NpTMIosuqxpGjHmEYiVJzFDLEbXLmPpn6W/JyWTz5Mf4zsyDT+gshoEAkSlQFhzhE6BQTPDv1 5WATgDnDBAwPzKaAgIUDjlYdAacwBMCXUKePcmSMB7TOGYgfZey0e477tCv6UQgSsVGKkCza+KMW2 xGrzi7Wla9uiqlwtUe8MZ79DgJCJYpNgy/wnPg8Ry1uJKjPCZ79FRwkCsAOWI5h1cOzgtJR2+B6jZ KZ/QZB4dlHWiGEq9ZYAQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nA7I8-004aAy-K7; Wed, 19 Jan 2022 09:30:08 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nA7I4-004a7E-BW for linux-arm-kernel@lists.infradead.org; Wed, 19 Jan 2022 09:30:05 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 434F311D4; Wed, 19 Jan 2022 01:30:00 -0800 (PST) Received: from C02TD0UTHF1T.local (unknown [10.57.38.123]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 560623F766; Wed, 19 Jan 2022 01:29:58 -0800 (PST) Date: Wed, 19 Jan 2022 09:29:50 +0000 From: Mark Rutland To: Arnd Bergmann Cc: Anshuman Khandual , Linux ARM , Catalin Marinas , Will Deacon , Mathieu Poirier , Suzuki Poulose , coresight@lists.linaro.org, Linux Kernel Mailing List Subject: Re: [PATCH 1/2] arm64: Add Cortex-X2 CPU part definition Message-ID: <20220119092950.GA42546@C02TD0UTHF1T.local> References: <1641980099-20315-1-git-send-email-anshuman.khandual@arm.com> <1641980099-20315-2-git-send-email-anshuman.khandual@arm.com> <00e28671-8d3a-f789-91c4-109814792a07@arm.com> <519f3b4e-e790-c051-3cb1-3fd229a3e498@arm.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220119_013004_473092_28436B7D X-CRM114-Status: GOOD ( 21.08 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Arnd, On Wed, Jan 19, 2022 at 08:44:54AM +0100, Arnd Bergmann wrote: > On Wed, Jan 19, 2022 at 7:44 AM Anshuman Khandual > wrote: > > On 1/13/22 5:17 PM, Arnd Bergmann wrote: > > > > > > It also helps me personally to have a known place to look up the names > > > by value rather than chasing through reference manuals. > > > > IIUC the purpose here would be a quick CPU ID documentation reference check ? > > I will wait for other opinions here and add the remaining in a separate patch > > probably. > > The purpose would be to do what is obviously the right thing, and to avoid > more patches getting sent the next time someone needs to add a workaround > for another core that is already known. The general policy we've taken is to only add part definitions as and when they're required (e.g. alongside an errata workaround that needs to identify the part), since the kernel doesn't otherwise need to know, and it keeps the errata workaround patches self-contained (and ensures the MIDR definitions get tested as they're added). So per usual policy I don't think we should add the other part definitions here. If and when errata appear that requires us to identify those parts we can add corresponding MIDR definitions. > If you can't do this without more discussion, then just use your > current version and let the next person do it. As above, for now I think we should leave this as-is, and only add the Cortex-X2 part definition. Thanks, Mark. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel