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From: Maxime Ripard <maxime@cerno.tech>
To: Florian Fainelli <f.fainelli@gmail.com>
Cc: Stefan Wahren <stefan.wahren@i2se.com>,
	Phil Elwell <phil@raspberrypi.com>,
	Dave Stevenson <dave.stevenson@raspberrypi.com>,
	"moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE"
	<linux-arm-kernel@lists.infradead.org>,
	 Nicolas Saenz Julienne <nsaenz@kernel.org>
Subject: Re: [BUG] bcm2711: bad_chained_irq in brcmstb_l2_intc_irq_handle
Date: Thu, 20 Jan 2022 16:54:05 +0100	[thread overview]
Message-ID: <20220120155405.jeg7cx4lafnytun4@houat> (raw)
In-Reply-To: <bdda31f0-7ec0-50e8-dfaa-d8536a3219e5@gmail.com>


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Hi Florian,

On Sun, Jan 16, 2022 at 08:59:15PM -0800, Florian Fainelli wrote:
> > >   12:     130322      26028      27670     135225     GICv2  30 Level
> > > arch_timer
> > >   13:          0          0          0          0     GICv2  27 Level
> > > kvm guest vtimer
> > >   19:          0          0          0          0     GICv2 107 Level
> > > fe004000.txp
> > >   20:       7450          0          0          0     GICv2  65 Level
> > > fe00b880.mailbox
> > >   25:       6525          0          0          0     GICv2 153 Level
> > > uart-pl011
> > >   26:          0          0          0          0     GICv2 149 Level
> > > fe205000.i2c, fe804000.i2c
> > >   27:          9          0          0          0     GICv2 125 Level
> > > ttyS1
> > >   28:      36999          0          0          0     GICv2 158 Level
> > > mmc0, mmc1
> > >   29:          1          0          0          0     GICv2 129 Level
> > > vc4 hvs
> > >   30:          0          0          0          0     GICv2 105 Level
> > > fe980000.usb, fe980000.usb
> > >   31:          0          0          0          0     GICv2 112 Level
> > > DMA IRQ
> > >   33:          0          0          0          0     GICv2 114 Level
> > > DMA IRQ
> > >   40:          0          0          0          0     GICv2 141 Level
> > > vc4 crtc
> > >   41:          0          0          0          0     GICv2 142 Level
> > > vc4 crtc, vc4 crtc
> > >   42:         10          0          0          0     GICv2 133 Level
> > > vc4 crtc
> > >   43:          1          0          0          0
> > > interrupt-controller@7ef00100   0 Edge      vc4 hdmi cec tx
> > >   44:          0          0          0          0
> > > interrupt-controller@7ef00100   1 Edge      vc4 hdmi cec rx
> > >   47:          0          0          0          0
> > > interrupt-controller@7ef00100   4 Edge      vc4 hdmi hpd connected
> > >   48:          1          0          0          0
> > > interrupt-controller@7ef00100   5 Edge      vc4 hdmi hpd disconnected
> > >   49:          0          0          0          0
> > > interrupt-controller@7ef00100   8 Edge      vc4 hdmi cec tx
> > >   50:          0          0          0          0
> > > interrupt-controller@7ef00100   7 Edge      vc4 hdmi cec rx
> > >   53:          0          0          0          0
> > > interrupt-controller@7ef00100  10 Edge      vc4 hdmi hpd connected
> > >   54:          0          0          0          0
> > > interrupt-controller@7ef00100  11 Edge      vc4 hdmi hpd disconnected
> > >   55:          7          0          0          0     GICv2  66 Level
> > > VCHIQ doorbell
> > >   56:          0          0          0          0     GICv2  48 Level
> > > arm-pmu
> > >   57:          0          0          0          0     GICv2  49 Level
> > > arm-pmu
> > >   58:          0          0          0          0     GICv2  50 Level
> > > arm-pmu
> > >   59:          0          0          0          0     GICv2  51 Level
> > > arm-pmu
> > >   62:      47599          0          0          0     GICv2 189 Level
> > > eth0
> > >   63:       4681          0          0          0     GICv2 190 Level
> > > eth0
> > >   64:          0          0          0          0     GICv2 175 Level
> > > PCIe PME, aerdrv
> > >   65:        326          0          0          0  BRCM STB PCIe MSI
> > > 524288 Edge      xhci_hcd
> > > IPI0:      2442       5185       7195      18290       Rescheduling
> > > interrupts
> > > IPI1:       481        383        518        533       Function call
> > > interrupts
> > > IPI2:         0          0          0          0       CPU stop
> > > interrupts
> > > IPI3:         0          0          0          0       CPU stop (for
> > > crash dump) interrupts
> > > IPI4:         0          0          0          0       Timer broadcast
> > > interrupts
> > > IPI5:         1          0          0          0       IRQ work
> > > interrupts
> > > IPI6:         0          0          0          0       CPU wake-up
> > > interrupts
> > > Err:          1
> > > 
> > > Comparing the vendor & mainline DTS, i noticed differences at hdmi0/1.
> > > The vendor DTS has an additional register to access the same space as
> > > aon_intr (interrupt parent), which looks ugly [2].
> > 
> > OK, so while I do see how we set external_irq_controller to let the
> > interrupt be managed externally from vc4_hdmi.c else do it internally, I
> > don't see the code that tries to map the "intr2" register space, let
> > alone fetch its resource, do you know where that is?
> 
> Downstream appears to be setting the 'aon_intr' Device Tree node with a
> status = disabled property, still leaves me wondering whether the "intr2"
> register space is used.

It's not used, its last (and only) user was reverted in:
https://github.com/raspberrypi/linux/commit/07170fdd6daffb3fb276a9dc814d6d02d82b055f

> I think it would be prudent to change the hpd_con, hpd_rm variables in
> vc4_hdmi.c to be signed integers instead of unsigned integers, if nothing
> else such that -EPROBE_DEFER might be returned.

Yeah, that would make sense.

Maxime

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  reply	other threads:[~2022-01-20 15:55 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-01-16 17:26 [BUG] bcm2711: bad_chained_irq in brcmstb_l2_intc_irq_handle Stefan Wahren
2022-01-16 20:15 ` Florian Fainelli
2022-01-17  4:59   ` Florian Fainelli
2022-01-20 15:54     ` Maxime Ripard [this message]
2022-01-20 15:39 ` Maxime Ripard
2022-01-20 18:10   ` Stefan Wahren
2022-01-20 19:48     ` Florian Fainelli
2022-01-20 21:23       ` Stefan Wahren
2022-01-20 21:38         ` Florian Fainelli
2022-01-21  3:51           ` Florian Fainelli

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