From: Stephen Boyd <sboyd@kernel.org>
To: Marek Vasut <marex@denx.de>, linux-arm-kernel@lists.infradead.org
Cc: jneuhauser@dh-electronics.com, Marek Vasut <marex@denx.de>,
Alexandre Torgue <alexandre.torgue@foss.st.com>,
Christophe Roullier <christophe.roullier@foss.st.com>,
Gabriel Fernandez <gabriel.fernandez@foss.st.com>,
Patrice Chotard <patrice.chotard@foss.st.com>,
Patrick Delaunay <patrick.delaunay@foss.st.com>,
linux-clk@vger.kernel.org,
linux-stm32@st-md-mailman.stormreply.com
Subject: Re: [PATCH 1/5] clk: stm32mp1: Split ETHCK_K into separate MUX and GATE clock
Date: Thu, 20 Jan 2022 14:03:54 -0800 [thread overview]
Message-ID: <20220120220356.79C3CC340E0@smtp.kernel.org> (raw)
In-Reply-To: <20220118202958.1840431-1-marex@denx.de>
Quoting Marek Vasut (2022-01-18 12:29:54)
> The ETHCK_K are modeled as composite clock of MUX and GATE, however per
> STM32MP1 Reference Manual RM0436 Rev 3, Page 574, Figure 83. Peripheral
> clock distribution for Ethernet, ETHPTPDIV divider is attached past the
> ETHCK_K mux, and ETH_CLK/eth_clk_fb clock are output past ETHCKEN gate.
> Therefore, in case ETH_CLK/eth_clk_fb are not in use AND PTP clock are
> in use, ETHCKEN gate can be turned off. Current driver does not permit
> that, fix it.
>
> This patch converts ETHCK_K from composite clock into a ETHCKEN gate,
> ETHPTP_K from composite clock into ETHPTPDIV divider, and adds another
> NO_ID clock "ck_ker_eth" which models the ETHSRC mux and is parent clock
> to both ETHCK_K and ETHPTP_K. Therefore, all references to ETHCK_K and
> ETHPTP_K remain functional as before.
>
> [1] STM32MP1 Reference Manual RM0436 Rev 3, Page 574,
> Figure 83. Peripheral clock distribution for Ethernet
> https://www.st.com/resource/en/reference_manual/dm00327659-stm32mp157-advanced-armbased-32bit-mpus-stmicroelectronics.pdf
>
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>
> Cc: Christophe Roullier <christophe.roullier@foss.st.com>
> Cc: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
> Cc: Patrice Chotard <patrice.chotard@foss.st.com>
> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
> Cc: Stephen Boyd <sboyd@kernel.org>
> Cc: linux-clk@vger.kernel.org
> Cc: linux-stm32@st-md-mailman.stormreply.com
> To: linux-arm-kernel@lists.infradead.org
> ---
Any cover letter? What is the merge strategy of this patch series? Do I
need to ack the patches?
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next prev parent reply other threads:[~2022-01-20 22:05 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-18 20:29 [PATCH 1/5] clk: stm32mp1: Split ETHCK_K into separate MUX and GATE clock Marek Vasut
2022-01-18 20:29 ` [PATCH 2/5] clk: stm32mp1: Add parent_data to ETHRX clock Marek Vasut
2022-01-20 12:07 ` Johann Neuhauser
2022-01-21 9:05 ` gabriel.fernandez
2022-01-25 1:16 ` Stephen Boyd
2022-01-18 20:29 ` [PATCH 3/5] ARM: dts: stm32: Add alternate pinmux for ethernet0 pins Marek Vasut
2022-01-20 12:07 ` Johann Neuhauser
2022-02-07 11:47 ` Alexandre TORGUE
2022-01-18 20:29 ` [PATCH 4/5] ARM: dts: stm32: Add alternate pinmux for mco2 pins Marek Vasut
2022-01-20 12:07 ` Johann Neuhauser
2022-02-07 11:48 ` Alexandre TORGUE
2022-01-18 20:29 ` [PATCH 5/5] ARM: dts: stm32: Switch DWMAC RMII clock to MCO2 on DHCOM Marek Vasut
2022-01-20 12:08 ` Johann Neuhauser
2022-02-07 11:49 ` Alexandre TORGUE
2022-01-20 12:07 ` [PATCH 1/5] clk: stm32mp1: Split ETHCK_K into separate MUX and GATE clock Johann Neuhauser
2022-01-20 22:03 ` Stephen Boyd [this message]
2022-01-20 22:39 ` Marek Vasut
2022-01-21 13:12 ` Marek Vasut
2022-01-21 9:03 ` gabriel.fernandez
2022-01-25 1:16 ` Stephen Boyd
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