From: Bjorn Helgaas <helgaas@kernel.org>
To: Alain Volmat <avolmat@me.com>
Cc: Rob Herring <robh+dt@kernel.org>,
linux-pci@vger.kernel.org,
Patrice Chotard <patrice.chotard@foss.st.com>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org,
Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Subject: Re: [PATCH RESEND v2 1/5] dt-bindings: pci: st-pcie: PCIe controller found on STi platforms
Date: Mon, 24 Jan 2022 14:06:41 -0600 [thread overview]
Message-ID: <20220124200641.GA1546900@bhelgaas> (raw)
In-Reply-To: <20220103074731.3651-2-avolmat@me.com>
On Mon, Jan 03, 2022 at 08:47:27AM +0100, Alain Volmat wrote:
> Addition of the bindings for the Designware based PCIe controller
> that can be found on STi platforms such as STiH407, STiH410 or STiH418.
>
> Signed-off-by: Alain Volmat <avolmat@me.com>
> ---
> .../devicetree/bindings/pci/snps,dw-pcie.yaml | 2 +-
> .../devicetree/bindings/pci/st,st-pcie.yaml | 112 ++++++++++++++++++
> 2 files changed, 113 insertions(+), 1 deletion(-)
> create mode 100644 Documentation/devicetree/bindings/pci/st,st-pcie.yaml
>
> diff --git a/Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml b/Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml
> index 9ed0dfba7f89..3a92078128f7 100644
> --- a/Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml
> +++ b/Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml
> @@ -35,7 +35,7 @@ properties:
> maxItems: 5
> items:
> enum: [ dbi, dbi2, config, atu, app, elbi, mgmt, ctrl, parf, cfg, link,
> - ulreg, smu, mpu, apb, phy ]
> + ulreg, smu, mpu, apb, phy, mem-window ]
>
> num-lanes:
> description: |
> diff --git a/Documentation/devicetree/bindings/pci/st,st-pcie.yaml b/Documentation/devicetree/bindings/pci/st,st-pcie.yaml
> new file mode 100644
> index 000000000000..2fa686d573c3
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pci/st,st-pcie.yaml
> @@ -0,0 +1,112 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/pci/st,st-pcie.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: PCIe RC controller on ST STi platform
> +
> +maintainers:
> + - Alain Volmat <avolmat@me.com>
> +
> +allOf:
> + - $ref: /schemas/pci/snps,dw-pcie.yaml#
> +
> +properties:
> + compatible:
> + const: st,stih407-pcie
> +
> + reg:
> + items:
> + - description: Controller control and status registers.
> + - description: PCIe configuration registers.
> + - description: Memory made available to the controller
> +
> + reg-names:
> + items:
> + - const: dbi
> + - const: config
> + - const: mem-window
I guess "mem-window" is the range for inbound DMA? Other controllers
should have similar ranges. Can we use the same DT reg names used by
other controllers instead of adding something new and STi-specific?
> + interrupts:
> + maxItems: 1
> +
> + resets:
> + items:
> + - description: Controller reset
> + - description: Powerdown reset (optional)
> + minItems: 1
> +
> + reset-names:
> + items:
> + - const: softreset
> + - const: powerdown
"softreset" and "powerdown" appear only in this binding. Are they
really unique to STi, or can we use the same names used for other
controllers?
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2022-01-24 20:08 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-03 7:47 [PATCH RESEND v2 0/5] Introduction of PCIe support on STi platform Alain Volmat
2022-01-03 7:47 ` [PATCH RESEND v2 1/5] dt-bindings: pci: st-pcie: PCIe controller found on STi platforms Alain Volmat
2022-01-24 20:06 ` Bjorn Helgaas [this message]
2022-01-03 7:47 ` [PATCH RESEND v2 2/5] pci: dwc: pcie-st: Add PCIe driver for " Alain Volmat
2022-01-24 12:45 ` Patrice CHOTARD
2022-01-24 20:15 ` Bjorn Helgaas
2022-01-03 7:47 ` [PATCH RESEND v2 3/5] MAINTAINERS: add entry for ST STI PCIE driver Alain Volmat
2022-01-24 12:46 ` Patrice CHOTARD
2022-01-03 7:47 ` [PATCH RESEND v2 4/5] ARM: dts: sti: add the PCIe controller node within stih407-family Alain Volmat
2022-01-24 12:47 ` Patrice CHOTARD
2022-01-03 7:47 ` [PATCH RESEND v2 5/5] ARM: dts: sti: enable PCIe on the stih418-b2264 board Alain Volmat
2022-01-24 12:48 ` Patrice CHOTARD
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20220124200641.GA1546900@bhelgaas \
--to=helgaas@kernel.org \
--cc=avolmat@me.com \
--cc=fabrice.gasnier@foss.st.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=patrice.chotard@foss.st.com \
--cc=robh+dt@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox