From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5894AC433F5 for ; Tue, 25 Jan 2022 15:06:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=QEJ9zqi+mcVlX7Q08axdH1Ml6FABFR/CsryTUzZKVYQ=; b=r4IjUQNrjd7Okt DLp5XUKCxWbtSyEKkFvieHZ5xjZ+sKJaCPKmi4wEIKibreaMWLACbw/kJBqCNDZ7q+SxnZsbYHjSS laO2p2XWwUvuV859n7g1AwY52Y/cUKEXRnOKnCK46Eql0nlQHROKTNdCamzZcRXMetlAekWAEXqIK yP3hKCPDGCGVqzlsKN4z4LLXLYe5Zt2pmIUhO0WnsG6f3m1f/pf2DJ2XsicIvoyOhq/TPZWezK+fc 7OtEYLlhVkYm8501RuWSiYT7dSVNt/aagD22Er+Cuu0qNST8wrC63vGNRCSKyhPrz0lAw8QzUMVKj LrZSahzLISX9gNJsOXOA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nCNNS-008GAs-GU; Tue, 25 Jan 2022 15:04:58 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nCNJt-008EqA-C9 for linux-arm-kernel@lists.infradead.org; Tue, 25 Jan 2022 15:01:18 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id E3320101E; Tue, 25 Jan 2022 07:01:16 -0800 (PST) Received: from lakrids.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.121.207.14]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id BF3D03F793; Tue, 25 Jan 2022 07:01:15 -0800 (PST) From: Mark Rutland To: linux-arm-kernel@lists.infradead.org Cc: andre.przywara@arm.com, broonie@kernel.org, jaxson.han@arm.com, mark.rutland@arm.com, robin.murphy@arm.com, vladimir.murzin@arm.com, wei.chen@arm.com Subject: [bootwrapper PATCH v3 07/15] aarch64: add mov_64 macro Date: Tue, 25 Jan 2022 15:00:49 +0000 Message-Id: <20220125150057.3936090-8-mark.rutland@arm.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220125150057.3936090-1-mark.rutland@arm.com> References: <20220125150057.3936090-1-mark.rutland@arm.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220125_070117_489079_4481AFD7 X-CRM114-Status: GOOD ( 11.66 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org In subsequent patches we'll need to load 64-bit values into GPRs before the CPU is in a known endianness, where we cannot use literal pools. In preparation for that, this patch adds a new `mov_64` macro to load a 64-bit value into a GPR using a sequence of MOV and MOVKs, which will function the same regardless of the CPU's endianness. At the same time, move the `cpuid` macro to use `mov_64` internally. Signed-off-by: Mark Rutland Reviewed-by: Andre Przywara --- arch/aarch64/common.S | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/arch/aarch64/common.S b/arch/aarch64/common.S index c7171a9..3279fa9 100644 --- a/arch/aarch64/common.S +++ b/arch/aarch64/common.S @@ -9,9 +9,17 @@ #include + /* Load a 64-bit value using immediates */ + .macro mov_64 dest, val + mov \dest, #(((\val) >> 0) & 0xffff) + movk \dest, #(((\val) >> 16) & 0xffff), lsl #16 + movk \dest, #(((\val) >> 32) & 0xffff), lsl #32 + movk \dest, #(((\val) >> 48) & 0xffff), lsl #48 + .endm + /* Put MPIDR into \dest, clobber \tmp and flags */ .macro cpuid dest, tmp mrs \dest, mpidr_el1 - ldr \tmp, =MPIDR_ID_BITS + mov_64 \tmp, MPIDR_ID_BITS ands \dest, \dest, \tmp .endm -- 2.30.2 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel