From: Maxime Ripard <maxime@cerno.tech>
To: Samuel Holland <samuel@sholland.org>
Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>,
Chen-Yu Tsai <wens@csie.org>,
Jernej Skrabec <jernej.skrabec@gmail.com>,
linux-sunxi@lists.linux.dev,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, Rob Herring <robh+dt@kernel.org>,
devicetree@vger.kernel.org
Subject: Re: [PATCH 1/2] dt-bindings: nvmem: SID: Add compatible for D1
Date: Thu, 3 Feb 2022 09:13:33 +0100 [thread overview]
Message-ID: <20220203081333.au4iblrlktqixgwk@houat> (raw)
In-Reply-To: <20220203012502.10661-1-samuel@sholland.org>
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On Wed, Feb 02, 2022 at 07:25:00PM -0600, Samuel Holland wrote:
> D1 has a SID like other Allwinner SoCs, but with a unique eFuse layout.
> Add a new compatible string for it.
>
> Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Maxime Ripard <maxime@cerno.tech>
Maxime
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next prev parent reply other threads:[~2022-02-03 8:15 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-03 1:25 [PATCH 1/2] dt-bindings: nvmem: SID: Add compatible for D1 Samuel Holland
2022-02-03 1:25 ` [PATCH 2/2] nvmem: sunxi_sid: Add support for D1 variant Samuel Holland
2022-02-03 8:13 ` Maxime Ripard
2022-02-03 8:13 ` Maxime Ripard [this message]
2022-02-11 14:10 ` [PATCH 1/2] dt-bindings: nvmem: SID: Add compatible for D1 Rob Herring
2022-02-14 10:49 ` Srinivas Kandagatla
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