From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6E749C433F5 for ; Thu, 3 Feb 2022 12:16:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=adTkkwfHyxhDcw4EagN13HRgVYr0bb60VuohCuaIc7w=; b=NGxCL34M7KAmtj z71//hJinnCuVe0HahnBgZ3+inwM/NHsjlQfkvJdGvSVF6KP+ZFFF9IoItY6h27lCwLW7j63LdbEB aQ++ObIyjMlpYQEN+gwy1PwC/EFN0bZ1HymkOmBEXMmmNXdNv6LkLMd2rcyomrCfutQ/g32gpGR8u bO/fpoS3eCgobEYOCdQiBM9O/dbjfT7GbU0bcmhGzFK5pTs7DlMP+kQ0r4E3/8qNp4pCe3HziRPrF d+H32ke+r6gnemoGukjtmFAh85rJZVVyhVIrQargRQxHspL/Mm6wCSWOtz6DaXW7FXA0LgBreXqKb LDAshAZjoIVq2aeKF58w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nFb0y-001AuC-7o; Thu, 03 Feb 2022 12:15:04 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nFasu-0017C0-Az for linux-arm-kernel@lists.infradead.org; Thu, 03 Feb 2022 12:06:45 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D6B8A11D4; Thu, 3 Feb 2022 04:06:43 -0800 (PST) Received: from e121896.arm.com (unknown [10.57.13.234]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 5BDC03F774; Thu, 3 Feb 2022 04:06:42 -0800 (PST) From: James Clark To: suzuki.poulose@arm.com, mathieu.poirier@linaro.org, coresight@lists.linaro.org Cc: leo.yan@linaro.com, mike.leach@linaro.org, James Clark , Leo Yan , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 13/15] coresight: Make ETM4x TRCSSPCICRn register accesses consistent with sysreg.h Date: Thu, 3 Feb 2022 12:06:01 +0000 Message-Id: <20220203120604.128396-14-james.clark@arm.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20220203120604.128396-1-james.clark@arm.com> References: <20220203120604.128396-1-james.clark@arm.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220203_040644_455682_5AB62C20 X-CRM114-Status: GOOD ( 10.33 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This is a no-op change for style and consistency and has no effect on the binary produced by gcc-11. Signed-off-by: James Clark --- drivers/hwtracing/coresight/coresight-etm4x-sysfs.c | 2 +- drivers/hwtracing/coresight/coresight-etm4x.h | 3 +++ 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c index 7d9372ba1168..682819467755 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c +++ b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c @@ -1843,7 +1843,7 @@ static ssize_t sshot_pe_ctrl_store(struct device *dev, spin_lock(&drvdata->spinlock); idx = config->ss_idx; - config->ss_pe_cmp[idx] = val & GENMASK(7, 0); + config->ss_pe_cmp[idx] = val & (TRCSSPCICRn_PC_MASK << TRCSSPCICRn_PC_SHIFT); /* must clear bit 31 in related status register on programming */ config->ss_status[idx] &= ~TRCSSCSRn_STATUS; spin_unlock(&drvdata->spinlock); diff --git a/drivers/hwtracing/coresight/coresight-etm4x.h b/drivers/hwtracing/coresight/coresight-etm4x.h index 9c22a5b0777f..9d0978540338 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x.h +++ b/drivers/hwtracing/coresight/coresight-etm4x.h @@ -251,6 +251,9 @@ #define TRCSSCCRn_SAC_ARC_RST_SHIFT 0 #define TRCSSCCRn_SAC_ARC_RST_MASK GENMASK(24, 0) +#define TRCSSPCICRn_PC_SHIFT 0 +#define TRCSSPCICRn_PC_MASK GENMASK(7, 0) + /* * System instructions to access ETM registers. * See ETMv4.4 spec ARM IHI0064F section 4.3.6 System instructions -- 2.28.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel