From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B70F9C433EF for ; Thu, 3 Feb 2022 12:17:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=CYZ0/se61TkMTq/O06GMbpmQEdgYv8eMX8pzAxEFrpU=; b=jd1F8MNKr6csVJ T+yfm7jT4sc8zaN6HGlG9XVvlAfnt+4ygec22c4PY30PqkqDEBce8yfGTT8nORpROuFLSkD7CwXks GeytUrd5TpjugciHAolD1tJBzdJ4Q8PH2JhF56tAJc+lDxbMkAS6jCuunrByIB8LUNYz6ToijpvxE LiAkOq4EpuEX1Hpg4ANlyaddgvmSf8Op9lfAzh2ET/uLCBORCPLU+y0QJXCFkw0AXKHvmcwmf72yW reE1RbVc7Ziu1ReOjjUUPm8fn+enVH/ceDEo9n/GPwyfUOtS2hyHFgaRcVOb6bQzUXPa54mgwTK5B dE4qOanvczhpKeNzRB3Q==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nFb23-001BKH-9s; Thu, 03 Feb 2022 12:16:12 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nFasx-0017E1-G1 for linux-arm-kernel@lists.infradead.org; Thu, 03 Feb 2022 12:06:49 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 7027111D4; Thu, 3 Feb 2022 04:06:46 -0800 (PST) Received: from e121896.arm.com (unknown [10.57.13.234]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id E93953F774; Thu, 3 Feb 2022 04:06:44 -0800 (PST) From: James Clark To: suzuki.poulose@arm.com, mathieu.poirier@linaro.org, coresight@lists.linaro.org Cc: leo.yan@linaro.com, mike.leach@linaro.org, James Clark , Leo Yan , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 14/15] coresight: Make ETM4x TRCBBCTLR register accesses consistent with sysreg.h Date: Thu, 3 Feb 2022 12:06:02 +0000 Message-Id: <20220203120604.128396-15-james.clark@arm.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20220203120604.128396-1-james.clark@arm.com> References: <20220203120604.128396-1-james.clark@arm.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220203_040647_630911_20510384 X-CRM114-Status: GOOD ( 10.42 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This is a no-op change for style and consistency and has no effect on the binary produced by gcc-11. Signed-off-by: James Clark --- drivers/hwtracing/coresight/coresight-etm4x-sysfs.c | 5 +++-- drivers/hwtracing/coresight/coresight-etm4x.h | 4 ++++ 2 files changed, 7 insertions(+), 2 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c index 682819467755..a0cdd2cd978a 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c +++ b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c @@ -707,10 +707,11 @@ static ssize_t bb_ctrl_store(struct device *dev, * individual range comparators. If include then at least 1 * range must be selected. */ - if ((val & BIT(8)) && (BMVAL(val, 0, 7) == 0)) + if ((val & TRCBBCTLR_MODE) && (REG_VAL(val, TRCBBCTLR_RANGE) == 0)) return -EINVAL; - config->bb_ctrl = val & GENMASK(8, 0); + config->bb_ctrl = val & (TRCBBCTLR_MODE | + (TRCBBCTLR_RANGE_MASK << TRCBBCTLR_RANGE_SHIFT)); return size; } static DEVICE_ATTR_RW(bb_ctrl); diff --git a/drivers/hwtracing/coresight/coresight-etm4x.h b/drivers/hwtracing/coresight/coresight-etm4x.h index 9d0978540338..4d943faade33 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x.h +++ b/drivers/hwtracing/coresight/coresight-etm4x.h @@ -254,6 +254,10 @@ #define TRCSSPCICRn_PC_SHIFT 0 #define TRCSSPCICRn_PC_MASK GENMASK(7, 0) +#define TRCBBCTLR_MODE BIT(8) +#define TRCBBCTLR_RANGE_SHIFT 0 +#define TRCBBCTLR_RANGE_MASK GENMASK(7, 0) + /* * System instructions to access ETM registers. * See ETMv4.4 spec ARM IHI0064F section 4.3.6 System instructions -- 2.28.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel