From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C1630C433F5 for ; Thu, 3 Feb 2022 12:18:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=A5nleFfUsX8YrlFHsRBp7VGs6KZoDA9EJLk/fT95xbM=; b=4phJacSPIEaSoi G/EqN97+Qc5CNxms7lSr3sSOlQqterBYoqCt+upkuJ60M0KMkUz1iBAMukSyEYSWOtMLW9rfIyKAG iOjqc1kk+fuld/EIU6DLnXR15sIjXTtgtiGehYj0UDMbbyUA+t0J6dUY363XuAfgsMlOH2HtgfiyH jPO4yn6zSX6qqGd1YnOMYq7v3HexBYCO8R5NykkyKXOg01Nx6RIgk24Dz6oGGXG5DfgUjiBAwPkWk +XG/TXviwByWZWQztyIJtPNx5u8SA7Kt4F5s6FREZU6PduddaRI4qZbNSWvMCxB3v1MRsyt74q9L3 WxGZGARGhhxhQTZfxMyQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nFb3E-001Bo2-I4; Thu, 03 Feb 2022 12:17:25 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nFasz-0017FJ-EA for linux-arm-kernel@lists.infradead.org; Thu, 03 Feb 2022 12:06:50 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 0C7861396; Thu, 3 Feb 2022 04:06:49 -0800 (PST) Received: from e121896.arm.com (unknown [10.57.13.234]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 85AB53F774; Thu, 3 Feb 2022 04:06:47 -0800 (PST) From: James Clark To: suzuki.poulose@arm.com, mathieu.poirier@linaro.org, coresight@lists.linaro.org Cc: leo.yan@linaro.com, mike.leach@linaro.org, James Clark , Leo Yan , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 15/15] coresight: Make ETM4x TRCRSCTLRn register accesses consistent with sysreg.h Date: Thu, 3 Feb 2022 12:06:03 +0000 Message-Id: <20220203120604.128396-16-james.clark@arm.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20220203120604.128396-1-james.clark@arm.com> References: <20220203120604.128396-1-james.clark@arm.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220203_040649_566889_D45F59E7 X-CRM114-Status: UNSURE ( 9.44 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This is a no-op change for style and consistency and has no effect on the binary produced by gcc-11. Signed-off-by: James Clark --- drivers/hwtracing/coresight/coresight-etm4x-sysfs.c | 7 +++++-- drivers/hwtracing/coresight/coresight-etm4x.h | 9 +++++++++ 2 files changed, 14 insertions(+), 2 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c index a0cdd2cd978a..c876a63fa84d 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c +++ b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c @@ -1728,8 +1728,11 @@ static ssize_t res_ctrl_store(struct device *dev, /* For odd idx pair inversal bit is RES0 */ if (idx % 2 != 0) /* PAIRINV, bit[21] */ - val &= ~BIT(21); - config->res_ctrl[idx] = val & GENMASK(21, 0); + val &= ~TRCRSCTLRn_PAIRINV; + config->res_ctrl[idx] = val & (TRCRSCTLRn_PAIRINV | + TRCRSCTLRn_INV | + (TRCRSCTLRn_GROUP_MASK << TRCRSCTLRn_GROUP_SHIFT) | + (TRCRSCTLRn_SELECT_MASK << TRCRSCTLRn_SELECT_SHIFT)); spin_unlock(&drvdata->spinlock); return size; } diff --git a/drivers/hwtracing/coresight/coresight-etm4x.h b/drivers/hwtracing/coresight/coresight-etm4x.h index 4d943faade33..dd2156a5e70b 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x.h +++ b/drivers/hwtracing/coresight/coresight-etm4x.h @@ -258,6 +258,15 @@ #define TRCBBCTLR_RANGE_SHIFT 0 #define TRCBBCTLR_RANGE_MASK GENMASK(7, 0) +#define TRCRSCTLRn_PAIRINV BIT(21) +#define TRCRSCTLRn_INV BIT(20) +#define TRCRSCTLRn_GROUP_SHIFT 16 +#define TRCRSCTLRn_GROUP_MASK GENMASK(3, 0) +#define TRCRSCTLRn_SELECT_SHIFT 0 +#define TRCRSCTLRn_SELECT_MASK GENMASK(15, 0) + + + /* * System instructions to access ETM registers. * See ETMv4.4 spec ARM IHI0064F section 4.3.6 System instructions -- 2.28.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel