From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B333FC433F5 for ; Wed, 9 Feb 2022 15:44:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Message-ID: Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:References: List-Owner; bh=pvuNONETbRhnvCV8Gt03aJpFDydmEF9e11PrgzYP3rc=; b=rA9dDZzDBD5dKT PNvpPyh6huFlQtlVrehIEilG+KazJxa++WaxhgJz16ofyJBsoWsCnKr8nm780mV/A0q6FJmmd8Vhp vOLCqLEWrejLWa0nJjmlTWrhrOiAI4HvMawlM/SpzlUlAIEuRyc/iv98TaIXF0/7o3lRHr6cpil0k 3WMhLS61UAGFbtm1FdS3MbZUZk/pjT++CvF+A160ljg4TRwXJSCPqGncQMxdktcqbp0qV+kHELKvz MYmLvzo0zJ1NynIBOUNgSs8+3UCWGaO59/UFwIRj+1D1gLbvLyKqfjKsWGZl8ukienXg0XliFzaOB ZA8h7z0XTHwpATrv/WIg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nHp7o-000eiK-Vn; Wed, 09 Feb 2022 15:43:21 +0000 Received: from dfw.source.kernel.org ([139.178.84.217]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nHp1M-000c9w-0F for linux-arm-kernel@lists.infradead.org; Wed, 09 Feb 2022 15:36:41 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id B108061221; Wed, 9 Feb 2022 15:36:38 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id EACE0C340E7; Wed, 9 Feb 2022 15:36:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1644420998; bh=AYiSnNGzd7sXenCfs60QjVqVRErTSfdKRWpFCVKKFQg=; h=Date:From:To:Cc:Subject:In-Reply-To:From; b=sdQdEymDMm2ZzCxwgTKBq6KkUy4nsmX/Xn5tZBfJmB54+vP1mVscS9kTjMmg5I+HP JOQkPPaj8u9SZrbVjVZzQFXqNNW1DQIqZnF3UhAII+SkXnuu4JrGUD42EAXPjYMkMd 1a5D+mS7NPEKwM/xDeM9Gg58ffg2s2LFGrpftCabW55o5HzgXfSZrvcDKlVn1NlcZR cBQMQjJpKI+n495D1Xb/pBs3pSUFgwDfGeudwiz02L/yr0yk+0WOfmREhIkwG3c6LK 7EtkoSWUFLnr6ujaV9PYrT4RkRCt+vuTxjbDr6z5S/aJylqEjBaOilbdt0ffAecCXM Gw+M2DBHNMhmg== Date: Wed, 9 Feb 2022 09:36:36 -0600 From: Bjorn Helgaas To: Richard Zhu Cc: l.stach@pengutronix.de, bhelgaas@google.com, lorenzo.pieralisi@arm.com, shawnguo@kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com Subject: Re: [RFC 2/2] PCI: imx6: Enable imx6qp pcie power management support Message-ID: <20220209153636.GA557361@bhelgaas> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1644390156-5940-2-git-send-email-hongxing.zhu@nxp.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220209_073640_163137_92F02FA4 X-CRM114-Status: GOOD ( 10.18 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org In subject, s/pcie/PCIe/ or remove it altogether, since I don't think it adds useful information. On Wed, Feb 09, 2022 at 03:02:36PM +0800, Richard Zhu wrote: > i.MX6QP PCIe supports the RESET logic, thus it can support > the L2 exit by the reset mechanism. > Enable the i.MX6QP PCIe suspend/resume operations support. Add blank line between paragraphs or rewrap into a single paragraph. Rewrap to fill 75 columns. What does "L2 exit by reset mechanism" mean? Is this an i.MX6-specific thing? If not, can you point me to the relevant part of the PCIe spec? Bjorn _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel