Re: [PATCH v2 RESEND 1/4] coresight: etm4x: Add lock for reading virtual context ID comparator

From: Mathieu Poirier <mathieu.poirier@linaro.org>
To: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: Leo Yan <leo.yan@linaro.org>, Mike Leach <mike.leach@linaro.org>,
	Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 RESEND 1/4] coresight: etm4x: Add lock for reading virtual context ID comparator
Date: Wed, 9 Feb 2022 09:58:00 -0700	[thread overview]
Message-ID: <20220209165800.GA3548585@p14s> (raw)
In-Reply-To: <5fbadc11-0371-7dec-3189-ef5908fb3122@arm.com>

Hey guys,

On Wed, Feb 09, 2022 at 09:42:29AM +0000, Suzuki K Poulose wrote:
> Hi Leo
> 
> On 09/02/2022 09:33, Leo Yan wrote:
> > Hi Suzuki,
> > 
> > On Wed, Feb 09, 2022 at 05:47:24AM +0000, Suzuki Kuruppassery Poulose wrote:
> > > Hi Leo
> > > 
> > > On 04/02/2022 15:24, Leo Yan wrote:
> > > > Updates to the values and the index are protected via the spinlock.
> > > > Ensure we use the same lock to read the value safely.
> > > > 
> > > > Signed-off-by: Leo Yan <leo.yan@linaro.org>
> > > > Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
> > > > ---
> > > >    drivers/hwtracing/coresight/coresight-etm4x-sysfs.c | 2 ++
> > > >    1 file changed, 2 insertions(+)
> > > > 
> > > > diff --git a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c
> > > > index 10ef2a29006e..2f3b4eef8261 100644
> > > > --- a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c
> > > > +++ b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c
> > > > @@ -2111,7 +2111,9 @@ static ssize_t vmid_val_show(struct device *dev,
> > > >    	struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
> > > >    	struct etmv4_config *config = &drvdata->config;
> > > > +	spin_lock(&drvdata->spinlock);
> > > >    	val = (unsigned long)config->vmid_val[config->vmid_idx];
> > > > +	spin_unlock(&drvdata->spinlock);
> > > >    	return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
> > > >    }
> > > 
> > > 
> > > I have queued this patch.
> > 
> > Thanks!
> > 
> > > For the rest, we would need to wait until the helper lands in the rc.
> 
> Sorry, that was not the exact argument, see below.
> 
> > 
> > The helper function patch has been landed on the mainline kernel,
> > it would be safe to merge the rest patches.
> > https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=d7e4f8545b497b3f5687e592f1c355cbaee64c8c
> 
> The coresight queue is based on rc1 and we already created a stable
> tag for TRBE erratas, which was pulled into arm64. So, (correct me
> if I am wrong), AFAIU, we cannot rebase the queue on to rc2 where
> the patch landed. But happy to proceed, if there is a solution.
> 
> Mathieu, what do you think ?

Your assesment above is correct - because the commitIDs have been published and
used in another tree we can't simply rebase to -rc2.  Otherwise we would end up
with the same patches with different commitIDs published in various trees.

To deal with this we would "normally" ask Jakub Kicinski to prepare a pull
request for us to use, after which Leo's patches could be applied.  But in this
case Catalin sent the arm64 part of the TRBE errata patchset to Linus as an -rc
fix.  As such those patches are already in Linus' tree with the same commitIDs
we currently have in the coresight-next tree.  

Therefore you can simply rebase to rc2 (or rc3) and pile up Leo's patches on
top of that. 

Thanks,
Mathieu

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