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Fri, 11 Feb 2022 02:45:32 -0800 (PST) Date: Fri, 11 Feb 2022 18:45:28 +0800 From: Leo Yan To: German Gomez Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, will@kernel.org, mark.rutland@arm.com, james.clark@arm.com Subject: Re: [RFC PATCH 1/2] perf: arm_spe: Fix consistency of PMSCR register bit CX Message-ID: <20220211104528.GA475776@leoy-ThinkPad-X240s> References: <20220117124432.3119132-1-german.gomez@arm.com> <20220117124432.3119132-2-german.gomez@arm.com> <20220205153940.GB391033@leoy-ThinkPad-X240s> <4d5951ee-d7d2-1e76-eb24-5f3c46d1662c@arm.com> <20220208130047.GA273989@leoy-ThinkPad-X240s> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220211_024536_071300_BA820916 X-CRM114-Status: GOOD ( 18.51 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi German, On Thu, Feb 10, 2022 at 05:23:50PM +0000, German Gomez wrote: [...] > >>>> One way to fix this is by caching the value of the CX bit during the > >>>> initialization of the PMU event, so that it remains consistent for the > >>>> duration of the session. > >>>> > >>>> [...] > > So the patch makes sense to me. Just a minor comment: > > > > Here we can define a u64 for recording pmscr value rather than a > > bool value. > > > > struct arm_spe_pmu { > > ... > > u64 pmscr; > > }; > > I agree with the comment from Will that it makes more sense to store the > value of the register in the perf_event somehow (due to misunderstanding > from my side, I thought arm_spe_pmu struct was local to the session). It's shame that I miss this point :) As you said, struct arm_spe_pmu is a data structure for Arm SPE device driver instance and it's not allocated for perf session. > What about perf_event's void *pmu_private? Before we use perf_event::pmu_private, could you check the data structure arm_spe_pmu_buf firstly? This data structure is allocated when setup AUX ring buffer (so it's allocated for perf session). IIUC, the function arm_spe_pmu_setup_aux() will be invoked in the perf process, so it's good for us to initialize pmscr in this function. Thanks, Leo _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel