From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B64EDC433FE for ; Fri, 11 Feb 2022 16:08:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=kis+EZmx3RMrpruc2qjQ4zKCA0F9MsrG2B3VF91AyZs=; b=h4KuCNRr3OSjXE PGQwqCjaZJF2LOYCd84bHT8yalfuYYfPtZHIRGMj+b1Qe/RbZsWRvn3fmd7ZDOGw8rs44nnWBC38U ahB3quig3YCsXDaKj+Qd7sJObXjomvc7mYtek4RTVm2TRV96wgmYgt1e0NHYL6DicJx57/lJDACWr PvoqEe/iG1RIpM4uewpOC7bsc0Ow/mJQIJ9dCQqiBuMR/33YJxZz6oOEab1TzbZejcdHZVsVhqFew Q+xq53D++ERHAcOJnV0I8AUVz97TPizRYI1k3ncRA4uJde5fOklOJexrL2pkMHzTJv5vIfEfe0T5N SCXtYDXVRNlHXTrgjs0Q==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nIYRw-007vBL-Bg; Fri, 11 Feb 2022 16:07:08 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nIYRs-007v6C-2l for linux-arm-kernel@lists.infradead.org; Fri, 11 Feb 2022 16:07:05 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 8DA86106F; Fri, 11 Feb 2022 08:06:53 -0800 (PST) Received: from lpieralisi (e121166-lin.cambridge.arm.com [10.1.196.255]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 906073F70D; Fri, 11 Feb 2022 08:06:51 -0800 (PST) Date: Fri, 11 Feb 2022 16:06:46 +0000 From: Lorenzo Pieralisi To: Baruch Siach , Andy Gross , Bjorn Andersson Cc: Selvam Sathappan Periakaruppan , Kathiravan T , Bjorn Helgaas , Rob Herring , Thierry Reding , Jonathan Hunter , Jingoo Han , Gustavo Pimentel , Robert Marko , Bryan O'Donoghue , linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-tegra@vger.kernel.org Subject: Re: [PATCH v6 0/3] PCI: IPQ6018 platform support Message-ID: <20220211160645.GA448@lpieralisi> References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.9.4 (2018-02-28) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220211_080704_246555_38947CCC X-CRM114-Status: GOOD ( 22.81 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, Feb 07, 2022 at 04:51:23PM +0200, Baruch Siach wrote: > This series adds support for the single PCIe lane on IPQ6018 SoCs. The code is > ported from downstream Codeaurora v5.4 kernel. The main difference from > downstream code is the split of PCIe registers configuration from .init to > .post_init, since it requires phy_power_on(). > > Tested on IPQ6010 based hardware. > > Changes in v6: > > * Drop DT patch applied to the qcom tree > > * Normalize driver changes subject line > > * Add a preparatory patch to rename PCIE_CAP_LINK1_VAL to PCIE_CAP_SLOT_VAL, > and define it using PCI_EXP_SLTCAP_* macros > > * Drop a vague comment about ASPM configuration > > * Add a comment about the source of delay periods > > Changes in v5: > > * Remove comments from qcom_pcie_init_2_9_0() (Bjorn Andersson) > > Changes in v4: > > * Drop applied DT bits > > * Add max-link-speed that was missing from the applied v2 patch > > * Rebase the driver on v5.16-rc3 > > Changes in v3: > > * Drop applied patches > > * Rely on generic code for speed setup > > * Drop unused macros > > * Formatting fixes > > Changes in v2: > > * Add patch moving GEN3_RELATED macros to a common header > > * Drop ATU configuration from pcie-qcom > > * Remove local definition of common registers > > * Use bulk clk and reset APIs > > * Remove msi-parent from device-tree > > Baruch Siach (2): > PCI: dwc: tegra: move GEN3_RELATED DBI register to common header > PCI: qcom: Define slot capabilities using PCI_EXP_SLTCAP_* > > Selvam Sathappan Periakaruppan (1): > PCI: qcom: Add IPQ60xx support > > drivers/pci/controller/dwc/pcie-designware.h | 7 + > drivers/pci/controller/dwc/pcie-qcom.c | 155 ++++++++++++++++++- > drivers/pci/controller/dwc/pcie-tegra194.c | 6 - > 3 files changed, 160 insertions(+), 8 deletions(-) Bjorn, Andy, Can you ACK please if this series is ready to be merged ? Thanks, Lorenzo _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel