From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C54D9C433F5 for ; Mon, 21 Feb 2022 08:33:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=yD/JCE6w6IS//Fd8u9sG/gHOEB8b2YYo/BboJRM81Sk=; b=J8JHcERhHd6KD/ 1P5+DjBAHEMo+dI+g+xMhs01iBjZHK+DcG8InkJqCBz4BOtCT2XnytZoG9SUJXuSCkk1CNAFO/uzk v5+DTVDqzbRmRraL+fAnWH3eWJRz4RdkKp9tFLOHP9NAeow+vWECfKUMGaWqpTt0z2c6rmx2GQi8G lSeeIKn0vNH9Aeo1wY1Xk29ujwO8T9MNcKiIgWCbGnVs4LzQmrZ3vitz3HAG9WNp/Ogt9x0bbXMrM QiH3YSJAPo2jnXPhUTMm4QUpnUPIvbLn9ekUEFLFz77SDWIJvoBV2B9zAdvDUoDTHWrrHniCGuKkN HN83AWZk8Nmrm+yN3w2Q==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nM46z-004Izn-C0; Mon, 21 Feb 2022 08:32:01 +0000 Received: from dfw.source.kernel.org ([139.178.84.217]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nM46v-004Iy9-FO for linux-arm-kernel@lists.infradead.org; Mon, 21 Feb 2022 08:31:58 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 8DED461050; Mon, 21 Feb 2022 08:31:56 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 2433EC340E9; Mon, 21 Feb 2022 08:31:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1645432315; bh=1OUb5ueXqaPD8ToS2GOvrc3KNL1RMvWCGpfF22Z4Nak=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=Z70eQxS4jkkXz5A6TA6vpAMMDkIxUQrOvESJvOwB6r3yshPsawn6kz4Q53hGjlu81 iZ1hZjpRtjibX8zmXDT5cSoaqdRC6TRSxSyUu7EoMf4OAhdPxdlNSLcZbnkNKKlueS C67osf2oL0WHFplDQ/qML8l44F0S+Rq466R/V4ddjDkkdW9VXzva5EnSaSyHba7xc/ rgrU1CKNTXy2oOe6V/fqPGeIQ8h9bHrL2piFRAUhHuy+rILEPnEQFS3HjUQGi6JxZh vToZMpq+9QIPHmIdrwRDmkMxmsUgbRn5wWiWuAZYZibov+IwaZ4nyE7p4vL6wwG+sK KpRnLtwJGvgCg== Date: Mon, 21 Feb 2022 16:31:49 +0800 From: Shawn Guo To: Richard Zhu Cc: l.stach@pengutronix.de, bhelgaas@google.com, lorenzo.pieralisi@arm.com, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com Subject: Re: [PATCH v4 1/2] ARM: dts: imx6qp-sabresd: Enable PCIe support Message-ID: <20220221083149.GS2249@dragon> References: <1645425237-4071-1-git-send-email-hongxing.zhu@nxp.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1645425237-4071-1-git-send-email-hongxing.zhu@nxp.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220221_003157_596407_AC4A6A15 X-CRM114-Status: GOOD ( 13.73 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, Feb 21, 2022 at 02:33:56PM +0800, Richard Zhu wrote: > In the i.MX6QP sabresd board(sch-28857) design, one external oscillator > is powered up by vgen3 and used as the PCIe reference clock source by > the endpoint device. > > If RC uses this oscillator as reference clock too, PLL6(ENET PLL) would > has to be in bypass mode, and ENET clocks would be messed up. > > To keep things simple, let RC use the internal PLL as reference clock > and set vgen3 always on to enable the external oscillator for endpoint > device on i.MX6QP sabresd board. > > NOTE: This reference clock setup is used to pass the GEN2 TX compliance > tests, and isn't recommended as a setup in the end-user design. > > Signed-off-by: Richard Zhu Applied, thanks! _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel