From: Mathieu Poirier <mathieu.poirier@linaro.org>
To: James Clark <james.clark@arm.com>
Cc: suzuki.poulose@arm.com, coresight@lists.linaro.org,
mike.leach@linaro.org, anshuman.khandual@arm.com,
leo.yan@linaro.com, Leo Yan <leo.yan@linaro.org>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 15/15] coresight: etm4x: Cleanup TRCRSCTLRn register accesses
Date: Wed, 23 Mar 2022 10:15:51 -0600 [thread overview]
Message-ID: <20220323161551.GB3248686@p14s> (raw)
In-Reply-To: <20220304171913.2292458-16-james.clark@arm.com>
On Fri, Mar 04, 2022 at 05:19:12PM +0000, James Clark wrote:
> This is a no-op change for style and consistency and has no effect on
> the binary output by the compiler. In sysreg.h fields are defined as
> the register name followed by the field name and then _MASK. This
> allows for grepping for fields by name rather than using magic numbers.
>
> Signed-off-by: James Clark <james.clark@arm.com>
> ---
> drivers/hwtracing/coresight/coresight-etm4x-sysfs.c | 7 +++++--
> drivers/hwtracing/coresight/coresight-etm4x.h | 7 +++++++
> 2 files changed, 12 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c
> index 3ae6f4432646..6ea8181816fc 100644
> --- a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c
> +++ b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c
> @@ -1726,8 +1726,11 @@ static ssize_t res_ctrl_store(struct device *dev,
> /* For odd idx pair inversal bit is RES0 */
> if (idx % 2 != 0)
> /* PAIRINV, bit[21] */
> - val &= ~BIT(21);
> - config->res_ctrl[idx] = val & GENMASK(21, 0);
> + val &= ~TRCRSCTLRn_PAIRINV;
> + config->res_ctrl[idx] = val & (TRCRSCTLRn_PAIRINV |
> + TRCRSCTLRn_INV |
> + TRCRSCTLRn_GROUP_MASK |
> + TRCRSCTLRn_SELECT_MASK);
> spin_unlock(&drvdata->spinlock);
> return size;
> }
> diff --git a/drivers/hwtracing/coresight/coresight-etm4x.h b/drivers/hwtracing/coresight/coresight-etm4x.h
> index 15704982357f..2c412841b126 100644
> --- a/drivers/hwtracing/coresight/coresight-etm4x.h
> +++ b/drivers/hwtracing/coresight/coresight-etm4x.h
> @@ -223,6 +223,13 @@
> #define TRCBBCTLR_MODE BIT(8)
> #define TRCBBCTLR_RANGE_MASK GENMASK(7, 0)
>
> +#define TRCRSCTLRn_PAIRINV BIT(21)
> +#define TRCRSCTLRn_INV BIT(20)
> +#define TRCRSCTLRn_GROUP_MASK GENMASK(19, 16)
> +#define TRCRSCTLRn_SELECT_MASK GENMASK(15, 0)
> +
> +
> +
Two extra lines.
> /*
> * System instructions to access ETM registers.
> * See ETMv4.4 spec ARM IHI0064F section 4.3.6 System instructions
> --
> 2.28.0
>
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next prev parent reply other threads:[~2022-03-23 16:17 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-04 17:18 [PATCH v3 00/15] Make ETM register accesses consistent with sysreg.h James Clark
2022-03-04 17:18 ` [PATCH v3 01/15] coresight: etm4x: Cleanup TRCIDR0 register accesses James Clark
2022-04-12 8:28 ` Mike Leach
2022-03-04 17:18 ` [PATCH v3 02/15] coresight: etm4x: Cleanup TRCIDR2 " James Clark
2022-04-12 8:30 ` Mike Leach
2022-03-04 17:19 ` [PATCH v3 03/15] coresight: etm4x: Cleanup TRCIDR3 " James Clark
2022-04-12 8:34 ` Mike Leach
2022-03-04 17:19 ` [PATCH v3 04/15] coresight: etm4x: Cleanup TRCIDR4 " James Clark
2022-04-12 8:37 ` Mike Leach
2022-03-04 17:19 ` [PATCH v3 05/15] coresight: etm4x: Cleanup TRCIDR5 " James Clark
2022-04-12 8:41 ` Mike Leach
2022-03-04 17:19 ` [PATCH v3 06/15] coresight: etm4x: Cleanup TRCCONFIGR " James Clark
2022-04-12 8:49 ` Mike Leach
2022-03-04 17:19 ` [PATCH v3 07/15] coresight: etm4x: Cleanup TRCEVENTCTL1R " James Clark
2022-04-12 9:09 ` Mike Leach
2022-03-04 17:19 ` [PATCH v3 08/15] coresight: etm4x: Cleanup TRCSTALLCTLR " James Clark
2022-04-12 9:18 ` Mike Leach
2022-03-04 17:19 ` [PATCH v3 09/15] coresight: etm4x: Cleanup TRCVICTLR " James Clark
2022-03-23 15:59 ` Mathieu Poirier
2022-03-28 10:41 ` James Clark
2022-04-12 10:15 ` Mike Leach
2022-03-04 17:19 ` [PATCH v3 10/15] coresight: etm3x: Cleanup ETMTECR1 " James Clark
2022-04-12 10:17 ` Mike Leach
2022-03-04 17:19 ` [PATCH v3 11/15] coresight: etm4x: Cleanup TRCACATRn " James Clark
2022-04-12 10:30 ` Mike Leach
2022-03-04 17:19 ` [PATCH v3 12/15] coresight: etm4x: Cleanup TRCSSCCRn and TRCSSCSRn " James Clark
2022-04-12 10:32 ` Mike Leach
2022-03-04 17:19 ` [PATCH v3 13/15] coresight: etm4x: Cleanup TRCSSPCICRn " James Clark
2022-04-12 10:39 ` Mike Leach
2022-03-04 17:19 ` [PATCH v3 14/15] coresight: etm4x: Cleanup TRCBBCTLR " James Clark
2022-04-12 10:41 ` Mike Leach
2022-03-04 17:19 ` [PATCH v3 15/15] coresight: etm4x: Cleanup TRCRSCTLRn " James Clark
2022-03-23 16:15 ` Mathieu Poirier [this message]
2022-04-12 10:42 ` Mike Leach
2022-03-23 16:22 ` [PATCH v3 00/15] Make ETM register accesses consistent with sysreg.h Mathieu Poirier
2022-03-28 10:41 ` James Clark
2022-04-13 17:08 ` Mathieu Poirier
2022-04-14 8:57 ` James Clark
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