From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3D679C433EF for ; Mon, 28 Mar 2022 13:56:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=LSiu1ZmueKZ1EDYvFrmv4b/hegOQV52G1R3DmtkCqVk=; b=xjb/JcPBnj8y9E vnHSz3Y5Jmj0hJ4JQwoGzIPbKc7NAtSrnzH6VAh5v6rGCG4j0IZOXreRgEqONH8A+rOfnRyavjeCZ OLhFIXknXeju75a70UjxwQITpSX3fx+p4o72QOgQt1WxHz0t+iDYIQgskx8iFWr1VBqfdjCT2Hl8I oXzWkrWF2P+nyNeCHk4C+8nBkCBfewUEWHM3hXQFfR3B/z6KZjFIG4pWVe/574snY9oAu8bAP62oA fqYble+PHjLRo1mmdXvmghb3XrJ8Ptte/6+yZA429wUSnhBhzjcB0qwkln/vfcrZFrExqaMOuWmjS 1fNlYONqCHPumeYAVcJA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nYppS-008wMj-BX; Mon, 28 Mar 2022 13:54:42 +0000 Received: from ams.source.kernel.org ([2604:1380:4601:e00::1]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nYpib-008taI-Vf for linux-arm-kernel@lists.infradead.org; Mon, 28 Mar 2022 13:47:45 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 2E66DB80F3B; Mon, 28 Mar 2022 13:47:36 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 9B6ADC340F3; Mon, 28 Mar 2022 13:47:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1648475254; bh=ArwZc6JZ2ffegh/jDKC+2TxbilLPRoEutwaItN74nP8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ZQhaKt3vUUnELVfG6sEb9nQdZ89Ew4743rk47gGRfiO0keiRSYIAVkzms6pzd5amM z5C2r1ytaizvDfNGSY3tFZBeuzANrb5UU20ZTCSGKe2XuHOBi/XMkrNH46OrsIEdKt /DCmWjaWKZHafJLHog/4XhsuRw2vyAael577BtXCW7olQfWII8DU5L9KCR81stycv1 q80RY98Jb5kcfY8KnDIyMBFq5Pibn5nm09ZITMzKMmgZUfvWKLF07WqyJ9zVskEvIW EfM+IykdeTpBuY1xkyZZaTwbXfrFzeYiwxaz/xmCW7wj9DxlXPoTn/w70xowQGx97n iyXxs5ZItJmGw== From: Ard Biesheuvel To: linux-arm-kernel@lists.infradead.org, linux@armlinux.org.uk Cc: arnd@arndb.de, linus.walleij@linaro.org, Ard Biesheuvel Subject: [PATCH 6/6] ARM: spectre-bhb: rely on linker to emit cross-section literal loads Date: Mon, 28 Mar 2022 15:47:14 +0200 Message-Id: <20220328134714.205342-7-ardb@kernel.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220328134714.205342-1-ardb@kernel.org> References: <20220328134714.205342-1-ardb@kernel.org> MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=3616; h=from:subject; bh=ArwZc6JZ2ffegh/jDKC+2TxbilLPRoEutwaItN74nP8=; b=owEB7QES/pANAwAKAcNPIjmS2Y8kAcsmYgBiQbxhv02nskPqRGxfS4J7ZwHG4X8YSfAwPcwJW2Y4 KgvBv/iJAbMEAAEKAB0WIQT72WJ8QGnJQhU3VynDTyI5ktmPJAUCYkG8YQAKCRDDTyI5ktmPJNuuC/ 4nMQqwydIH0HaD4cE2cGpLbBFGmBJi2fxDwshafv/p14v8uq8YT2fTh8/UpgFkwGcD5msWsrIDZhsK vowS3BA7+UqoOdYCDZmLE1VPmh+VSHFemVlyXUvv7oQ/q4lqcGRSM8Gyd/3Rma+olRgDCMW7uPanh5 R7eIQvX15i9RIOhZt3qRRVo0VtpgqywA/pZheUo0ffNLk5vSpaXPccerYSxAVrwFSWtG8iRu4NJFHI M2OzljD39m4NcQQkn2gGRyKGfi4OaDg/gRKVKGkFadzMjy8QNQMCTQyfzZn1QFQuVaLjz9ZpKE+hui JO2kQpe7v6ysU7IzA3YvXsEy+YkvGihbOYfrOD4qplzaFgRNIKRKyNzyX92qQfb3ViPHfixZeyNVw7 VFb5BgLSPbMOkcZFQdx0yGfg5VcR9CgXgdDWsjn5eR82pRWAdkf9N5otCC21tAuquTSlLZbfiTh62w JjWGkMe1E4Hn3V0BH5kI/p59s2xc/+43O6QxJUqnP+TIc= X-Developer-Key: i=ardb@kernel.org; a=openpgp; fpr=F43D03328115A198C90016883D200E9CA6329909 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220328_064738_412406_36EE3E81 X-CRM114-Status: GOOD ( 17.89 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The assembler does not permit 'LDR PC, ' when the symbol lives in a different section, which is why we have been relying on rather fragile open-coded arithmetic to load the address of the vector_swi routine into the program counter using a single LDR instruction in the SWI slot in the vector table. The literal was moved to a different section to in commit 19accfd373847 ("ARM: move vector stubs") to ensure that the vector stubs page does not need to be mapped readable for user space, which is the case for the vector page itself, as it carries the kuser helpers as well. So the cross-section literal load is open-coded, and this relies on the address of vector_swi to be at the very start of the vector stubs page, and we won't notice if we got it wrong until booting the kernel and see it break. Fortunately, it was guaranteed to break, so this was fragile but not problematic. Now that we have added two other variants of the vector table, we have 3 occurrences of the same trick, and so the size of our ISA/compiler/CPU validation space has tripled, in a way that may cause regressions to only be observed once booting the image in question on a CPU that exercises a particular vector table. So let's switch to true cross section references, and let the linker fix them up like it fixes up all the other cross section references in the vector page. Signed-off-by: Ard Biesheuvel --- arch/arm/kernel/entry-armv.S | 22 +++++++++++++------- 1 file changed, 15 insertions(+), 7 deletions(-) diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S index d08e7f62ae57..f17adc0b5b6a 100644 --- a/arch/arm/kernel/entry-armv.S +++ b/arch/arm/kernel/entry-armv.S @@ -1064,10 +1064,15 @@ ENDPROC(vector_bhb_loop8_\name) .endm .section .stubs, "ax", %progbits - @ This must be the first word + @ These need to remain at the start of the section so that + @ they are in range of the 'SWI' entries in the vector tables + @ located 4k down. +.L__vector_swi: .word vector_swi #ifdef CONFIG_HARDEN_BRANCH_HISTORY +.L__vector_bhb_loop8_swi: .word vector_bhb_loop8_swi +.L__vector_bhb_bpiall_swi: .word vector_bhb_bpiall_swi #endif @@ -1210,10 +1215,11 @@ vector_addrexcptn: .globl vector_fiq .section .vectors, "ax", %progbits -.L__vectors_start: W(b) vector_rst W(b) vector_und - W(ldr) pc, .L__vectors_start + 0x1000 +ARM( .reloc ., R_ARM_LDR_PC_G0, .L__vector_swi ) +THUMB( .reloc ., R_ARM_THM_PC12, .L__vector_swi ) + W(ldr) pc, . W(b) vector_pabt W(b) vector_dabt W(b) vector_addrexcptn @@ -1222,10 +1228,11 @@ vector_addrexcptn: #ifdef CONFIG_HARDEN_BRANCH_HISTORY .section .vectors.bhb.loop8, "ax", %progbits -.L__vectors_bhb_loop8_start: W(b) vector_rst W(b) vector_bhb_loop8_und - W(ldr) pc, .L__vectors_bhb_loop8_start + 0x1004 +ARM( .reloc ., R_ARM_LDR_PC_G0, .L__vector_bhb_loop8_swi ) +THUMB( .reloc ., R_ARM_THM_PC12, .L__vector_bhb_loop8_swi ) + W(ldr) pc, . W(b) vector_bhb_loop8_pabt W(b) vector_bhb_loop8_dabt W(b) vector_addrexcptn @@ -1233,10 +1240,11 @@ vector_addrexcptn: W(b) vector_bhb_loop8_fiq .section .vectors.bhb.bpiall, "ax", %progbits -.L__vectors_bhb_bpiall_start: W(b) vector_rst W(b) vector_bhb_bpiall_und - W(ldr) pc, .L__vectors_bhb_bpiall_start + 0x1008 +ARM( .reloc ., R_ARM_LDR_PC_G0, .L__vector_bhb_bpiall_swi ) +THUMB( .reloc ., R_ARM_THM_PC12, .L__vector_bhb_bpiall_swi ) + W(ldr) pc, . W(b) vector_bhb_bpiall_pabt W(b) vector_bhb_bpiall_dabt W(b) vector_addrexcptn -- 2.30.2 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel