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Thu, 7 Apr 2022 03:53:59 -0400 (EDT) Date: Thu, 7 Apr 2022 09:53:56 +0200 From: Maxime Ripard To: Tony Lindgren Cc: Marek Szyprowski , Mike Turquette , Stephen Boyd , linux-clk@vger.kernel.org, Dmitry Osipenko , 'Linux Samsung SOC' , linux-amlogic@lists.infradead.org, linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v2 3/3] clk: Drop the rate range on clk_put Message-ID: <20220407075356.lmqnax35cewiwh4k@houat> References: <20220325161144.1901695-1-maxime@cerno.tech> <20220325161144.1901695-4-maxime@cerno.tech> <366a0232-bb4a-c357-6aa8-636e398e05eb@samsung.com> <20220330084710.3r6b5pjspz5hdmy6@houat> MIME-Version: 1.0 In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220407_005405_038911_79CB33C2 X-CRM114-Status: GOOD ( 30.93 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: multipart/mixed; boundary="===============0665304033090527439==" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org --===============0665304033090527439== Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="iwpvajgf3v6xunui" Content-Disposition: inline --iwpvajgf3v6xunui Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Hi Tony, On Thu, Mar 31, 2022 at 12:42:10PM +0300, Tony Lindgren wrote: > * Maxime Ripard [700101 02:00]: > > Hi Marek, > >=20 > > On Wed, Mar 30, 2022 at 10:06:13AM +0200, Marek Szyprowski wrote: > > > On 25.03.2022 17:11, Maxime Ripard wrote: > > > > While the current code will trigger a new clk_set_rate call wheneve= r the > > > > rate boundaries are changed through clk_set_rate_range, this doesn't > > > > occur when clk_put() is called. > > > > > > > > However, this is essentially equivalent since, after clk_put() > > > > completes, those boundaries won't be enforced anymore. > > > > > > > > Let's add a call to clk_set_rate_range in clk_put to make sure those > > > > rate boundaries are dropped and the clock drivers can react. > > > > > > > > Let's also add a few tests to make sure this case is covered. > > > > > > > > Fixes: c80ac50cbb37 ("clk: Always set the rate on clk_set_range_rat= e") > > > > Signed-off-by: Maxime Ripard > > >=20 > > > This patch landed recently in linux-next 20220328 as commit 7dabfa2bc= 480=20 > > > ("clk: Drop the rate range on clk_put()"). Sadly it breaks booting of= =20 > > > the few of my test systems: Samsung ARM 32bit Exynos3250 based Rinato= =20 > > > board and all Amlogic Meson G12B/SM1 based boards (Odroid C4, N2, Kha= das=20 > > > VIM3/VIM3l). Rinato hangs always with the following oops: > > >=20 > > > --->8--- > > >=20 > > > Kernel panic - not syncing: MCT hangs after writing 4 (offset:0x420) > > > CPU: 1 PID: 0 Comm: swapper/1 Not tainted 5.17.0-rc1-00014-g7dabfa2bc= 480=20 > > > #11551 > > > Hardware name: Samsung Exynos (Flattened Device Tree) > > > =A0unwind_backtrace from show_stack+0x10/0x14 > > > =A0show_stack from dump_stack_lvl+0x58/0x70 > > > =A0dump_stack_lvl from panic+0x10c/0x328 > > > =A0panic from exynos4_mct_tick_stop+0x0/0x2c > > > ---[ end Kernel panic - not syncing: MCT hangs after writing 4=20 > > > (offset:0x420) ]--- > > >=20 > > > --->8--- > > >=20 > > > Amlogic boards hang randomly during early userspace init, usually jus= t=20 > > > after loading the driver modules. > > >=20 > > > Reverting $subject on top of linux-next fixes all those problems. > > >=20 > > > I will try to analyze it a bit more and if possible provide some more= =20 > > > useful/meaning full logs later. > >=20 > > I'm not sure what could go wrong there, but if you can figure out the > > clock, if it tries to set a new rate and what rate it is, it would be > > awesome :) >=20 > I'm also seeing clockevent break on omaps as a wrong source clock gets > picked. >=20 > It seems the dts assigned-clock-parents no longer works now? >=20 > So the following no longer sets omap_32k_fck as the clockevent source: >=20 > timer@0 { > assigned-clocks =3D <&gpt1_fck>; > assigned-clock-parents =3D <&omap_32k_fck>; > }; I haven't been able to find an omap3 board or a qemu target that could help me debug this, but I fixed a few issues already that could fix omap as well. Could you test today's https://github.com/mripard/linux/tree/rpi/clk-improvements-more-fixes And let me know if it works? Thanks! Maxime --iwpvajgf3v6xunui Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYKAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCYk6YlAAKCRDj7w1vZxhR xaesAQC4rR3HwZovHNfTkG3Cba2C43aYvgAwbaS5SnVSfgnWiAEAnUJlYI5I8mZP JQC1kn9HqNOIjnjd0KlyG9Tofs6M/AA= =dFvE -----END PGP SIGNATURE----- --iwpvajgf3v6xunui-- --===============0665304033090527439== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel --===============0665304033090527439==--