From: Yong Wu <yong.wu@mediatek.com>
To: Joerg Roedel <joro@8bytes.org>, Rob Herring <robh+dt@kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
Will Deacon <will@kernel.org>
Cc: Robin Murphy <robin.murphy@arm.com>,
Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>,
Tomasz Figa <tfiga@chromium.org>,
<linux-mediatek@lists.infradead.org>,
<srv_heupstream@mediatek.com>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<iommu@lists.linux-foundation.org>,
Hsin-Yi Wang <hsinyi@chromium.org>, <yong.wu@mediatek.com>,
<youlin.pei@mediatek.com>, <anan.sun@mediatek.com>,
<xueqi.zhang@mediatek.com>, <yen-chang.chen@mediatek.com>,
"AngeloGioacchino Del Regno"
<angelogioacchino.delregno@collabora.com>,
<mingyuan.ma@mediatek.com>, <yf.wang@mediatek.com>,
<libo.kang@mediatek.com>, <chengci.xu@mediatek.com>
Subject: [PATCH v6 20/34] iommu/mediatek: Add infra iommu support
Date: Thu, 7 Apr 2022 15:57:12 +0800 [thread overview]
Message-ID: <20220407075726.17771-21-yong.wu@mediatek.com> (raw)
In-Reply-To: <20220407075726.17771-1-yong.wu@mediatek.com>
The infra iommu enable bits in mt8195 is in the pericfg register segment,
use regmap to update it.
If infra iommu master translation fault, It doesn't have the larbid/portid,
thus print out the whole register value.
Since regmap_update_bits may fail, add return value for mtk_iommu_config.
Signed-off-by: Yong Wu <yong.wu@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
drivers/iommu/mtk_iommu.c | 36 +++++++++++++++++++++++++++++-------
drivers/iommu/mtk_iommu.h | 2 ++
2 files changed, 31 insertions(+), 7 deletions(-)
diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c
index afb77a530f32..d975c892b332 100644
--- a/drivers/iommu/mtk_iommu.c
+++ b/drivers/iommu/mtk_iommu.c
@@ -112,6 +112,8 @@
#define MTK_PROTECT_PA_ALIGN 256
+#define PERICFG_IOMMU_1 0x714
+
#define HAS_4GB_MODE BIT(0)
/* HW will use the EMI clock if there isn't the "bclk". */
#define HAS_BCLK BIT(1)
@@ -343,8 +345,8 @@ static irqreturn_t mtk_iommu_isr(int irq, void *dev_id)
write ? IOMMU_FAULT_WRITE : IOMMU_FAULT_READ)) {
dev_err_ratelimited(
data->dev,
- "fault type=0x%x iova=0x%llx pa=0x%llx larb=%d port=%d layer=%d %s\n",
- int_state, fault_iova, fault_pa, fault_larb, fault_port,
+ "fault type=0x%x iova=0x%llx pa=0x%llx master=0x%x(larb=%d port=%d) layer=%d %s\n",
+ int_state, fault_iova, fault_pa, regval, fault_larb, fault_port,
layer, write ? "write" : "read");
}
@@ -388,14 +390,15 @@ static int mtk_iommu_get_domain_id(struct device *dev,
return -EINVAL;
}
-static void mtk_iommu_config(struct mtk_iommu_data *data, struct device *dev,
- bool enable, unsigned int domid)
+static int mtk_iommu_config(struct mtk_iommu_data *data, struct device *dev,
+ bool enable, unsigned int domid)
{
struct mtk_smi_larb_iommu *larb_mmu;
unsigned int larbid, portid;
struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev);
const struct mtk_iommu_iova_region *region;
- int i;
+ u32 peri_mmuen, peri_mmuen_msk;
+ int i, ret = 0;
for (i = 0; i < fwspec->num_ids; ++i) {
larbid = MTK_M4U_TO_LARB(fwspec->ids[i]);
@@ -415,8 +418,19 @@ static void mtk_iommu_config(struct mtk_iommu_data *data, struct device *dev,
larb_mmu->mmu |= MTK_SMI_MMU_EN(portid);
else
larb_mmu->mmu &= ~MTK_SMI_MMU_EN(portid);
+ } else if (MTK_IOMMU_IS_TYPE(data->plat_data, MTK_IOMMU_TYPE_INFRA)) {
+ peri_mmuen_msk = BIT(portid);
+ peri_mmuen = enable ? peri_mmuen_msk : 0;
+
+ ret = regmap_update_bits(data->pericfg, PERICFG_IOMMU_1,
+ peri_mmuen_msk, peri_mmuen);
+ if (ret)
+ dev_err(dev, "%s iommu(%s) inframaster 0x%x fail(%d).\n",
+ enable ? "enable" : "disable",
+ dev_name(data->dev), peri_mmuen_msk, ret);
}
}
+ return ret;
}
static int mtk_iommu_domain_finalise(struct mtk_iommu_domain *dom,
@@ -531,8 +545,7 @@ static int mtk_iommu_attach_device(struct iommu_domain *domain,
}
mutex_unlock(&data->mutex);
- mtk_iommu_config(data, dev, true, domid);
- return 0;
+ return mtk_iommu_config(data, dev, true, domid);
err_unlock:
mutex_unlock(&data->mutex);
@@ -995,6 +1008,15 @@ static int mtk_iommu_probe(struct platform_device *pdev)
ret = mtk_iommu_mm_dts_parse(dev, &match, data);
if (ret)
goto out_runtime_disable;
+ } else if (MTK_IOMMU_IS_TYPE(data->plat_data, MTK_IOMMU_TYPE_INFRA) &&
+ data->plat_data->pericfg_comp_str) {
+ infracfg = syscon_regmap_lookup_by_compatible(data->plat_data->pericfg_comp_str);
+ if (IS_ERR(infracfg)) {
+ ret = PTR_ERR(infracfg);
+ goto out_runtime_disable;
+ }
+
+ data->pericfg = infracfg;
}
platform_set_drvdata(pdev, data);
diff --git a/drivers/iommu/mtk_iommu.h b/drivers/iommu/mtk_iommu.h
index f41e32252056..56838fad8c73 100644
--- a/drivers/iommu/mtk_iommu.h
+++ b/drivers/iommu/mtk_iommu.h
@@ -55,6 +55,7 @@ struct mtk_iommu_plat_data {
u32 flags;
u32 inv_sel_reg;
+ char *pericfg_comp_str;
struct list_head *hw_list;
unsigned int iova_region_nr;
const struct mtk_iommu_iova_region *iova_region;
@@ -80,6 +81,7 @@ struct mtk_iommu_data {
struct device *smicomm_dev;
struct dma_iommu_mapping *mapping; /* For mtk_iommu_v1.c */
+ struct regmap *pericfg;
struct mutex mutex; /* Protect m4u_group/m4u_dom above */
--
2.18.0
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next prev parent reply other threads:[~2022-04-07 8:26 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-07 7:56 [PATCH v6 00/34] MT8195 IOMMU SUPPORT Yong Wu
2022-04-07 7:56 ` [PATCH v6 01/34] dt-bindings: mediatek: mt8195: Add binding for MM IOMMU Yong Wu
2022-04-07 7:56 ` [PATCH v6 02/34] dt-bindings: mediatek: mt8195: Add binding for infra IOMMU Yong Wu
2022-04-07 7:56 ` [PATCH v6 03/34] iommu/mediatek: Fix 2 HW sharing pgtable issue Yong Wu
2022-04-07 7:56 ` [PATCH v6 04/34] iommu/mediatek: Add list_del in mtk_iommu_remove Yong Wu
2022-04-07 7:56 ` [PATCH v6 05/34] iommu/mediatek: Remove clk_disable " Yong Wu
2022-04-07 7:56 ` [PATCH v6 06/34] iommu/mediatek: Add mutex for m4u_group and m4u_dom in data Yong Wu
2022-04-07 7:56 ` [PATCH v6 07/34] iommu/mediatek: Add mutex for data in the mtk_iommu_domain Yong Wu
2022-04-07 7:57 ` [PATCH v6 08/34] iommu/mediatek: Adapt sharing and non-sharing pgtable case Yong Wu
2022-04-07 7:57 ` [PATCH v6 09/34] iommu/mediatek: Add 12G~16G support for multi domains Yong Wu
2022-04-07 7:57 ` [PATCH v6 10/34] iommu/mediatek: Add a flag DCM_DISABLE Yong Wu
2022-04-07 7:57 ` [PATCH v6 11/34] iommu/mediatek: Add a flag NON_STD_AXI Yong Wu
2022-04-28 14:52 ` Matthias Brugger
2022-04-07 7:57 ` [PATCH v6 12/34] iommu/mediatek: Remove the granule in the tlb flush Yong Wu
2022-04-07 7:57 ` [PATCH v6 13/34] iommu/mediatek: Always enable output PA over 32bits in isr Yong Wu
2022-04-07 7:57 ` [PATCH v6 14/34] iommu/mediatek: Add SUB_COMMON_3BITS flag Yong Wu
2022-04-07 7:57 ` [PATCH v6 15/34] iommu/mediatek: Add IOMMU_TYPE flag Yong Wu
2022-04-28 14:17 ` Matthias Brugger
2022-04-07 7:57 ` [PATCH v6 16/34] iommu/mediatek: Contain MM IOMMU flow with the MM TYPE Yong Wu
2022-04-07 7:57 ` [PATCH v6 17/34] iommu/mediatek: Adjust device link when it is sub-common Yong Wu
2022-04-07 7:57 ` [PATCH v6 18/34] iommu/mediatek: Allow IOMMU_DOMAIN_UNMANAGED for PCIe VFIO Yong Wu
2022-04-07 7:57 ` [PATCH v6 19/34] iommu/mediatek: Add a PM_CLK_AO flag for infra iommu Yong Wu
2022-04-07 7:57 ` Yong Wu [this message]
2022-04-07 7:57 ` [PATCH v6 21/34] iommu/mediatek: Add PCIe support Yong Wu
2022-04-07 7:57 ` [PATCH v6 22/34] iommu/mediatek: Add mt8195 support Yong Wu
2022-04-07 7:57 ` [PATCH v6 23/34] iommu/mediatek: Only adjust code about register base Yong Wu
2022-04-07 7:57 ` [PATCH v6 24/34] iommu/mediatek: Just move code position in hw_init Yong Wu
2022-04-07 7:57 ` [PATCH v6 25/34] iommu/mediatek: Separate mtk_iommu_data for v1 and v2 Yong Wu
2022-04-07 7:57 ` [PATCH v6 26/34] iommu/mediatek: Remove mtk_iommu.h Yong Wu
2022-04-07 7:57 ` [PATCH v6 27/34] iommu/mediatek-v1: Just rename mtk_iommu to mtk_iommu_v1 Yong Wu
2022-04-07 7:57 ` [PATCH v6 28/34] iommu/mediatek: Add mtk_iommu_bank_data structure Yong Wu
2022-04-07 7:57 ` [PATCH v6 29/34] iommu/mediatek: Initialise bank HW for each a bank Yong Wu
2022-04-07 7:57 ` [PATCH v6 30/34] iommu/mediatek: Change the domid to iova_region_id Yong Wu
2022-04-07 7:57 ` [PATCH v6 31/34] iommu/mediatek: Get the proper bankid for multi banks Yong Wu
2022-04-28 14:14 ` Matthias Brugger
2022-05-01 2:33 ` Yong Wu
2022-04-07 7:57 ` [PATCH v6 32/34] iommu/mediatek: Initialise/Remove for multi bank dev Yong Wu
2022-04-07 7:57 ` [PATCH v6 33/34] iommu/mediatek: Backup/restore regsiters for multi banks Yong Wu
2022-04-07 7:57 ` [PATCH v6 34/34] iommu/mediatek: mt8195: Enable multi banks for infra iommu Yong Wu
2022-04-19 9:00 ` [PATCH v6 00/34] MT8195 IOMMU SUPPORT AngeloGioacchino Del Regno
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