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charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Apr 13, 2022 at 01:33:46PM +0300, Abel Vesa wrote: > From: Jacky Bai > > On i.MX8DXL, the Connectivity subsystem includes below peripherals: > 1x ENET with AVB support, 1x ENET with TSN support, 2x USB OTG, > 1x eMMC, 2x SD, 1x NAND. > > Signed-off-by: Jacky Bai > Signed-off-by: Abel Vesa I got following warning with 'W=1' build flag. ../arch/arm64/boot/dts/freescale/imx8dxl-ss-conn.dtsi:10.45-15.4: Warning (simple_bus_reg): /bus@5b000000/clock-conn-enet0-root: missing or empty reg/ranges property ../arch/arm64/boot/dts/freescale/imx8dxl-ss-conn.dtsi:63.29-68.4: Warning (simple_bus_reg): /bus@5b000000/usbphy@0x5b110000: simple-bus unit address format error, expected "5b110000" ../arch/arm64/boot/dts/freescale/imx8dxl-ss-ddr.dtsi:7.27-12.4: Warning (simple_bus_reg): /bus@5c000000/clock-db-ipg: missing or empty reg/ranges property Shawn > --- > .../boot/dts/freescale/imx8dxl-ss-conn.dtsi | 134 ++++++++++++++++++ > 1 file changed, 134 insertions(+) > create mode 100644 arch/arm64/boot/dts/freescale/imx8dxl-ss-conn.dtsi > > diff --git a/arch/arm64/boot/dts/freescale/imx8dxl-ss-conn.dtsi b/arch/arm64/boot/dts/freescale/imx8dxl-ss-conn.dtsi > new file mode 100644 > index 000000000000..b776d0ed42b4 > --- /dev/null > +++ b/arch/arm64/boot/dts/freescale/imx8dxl-ss-conn.dtsi > @@ -0,0 +1,134 @@ > +// SPDX-License-Identifier: GPL-2.0+ > +/* > + * Copyright 2019-2021 NXP > + */ > + > +/delete-node/ &enet1_lpcg; > +/delete-node/ &fec2; > + > +&conn_subsys { > + conn_enet0_root_clk: clock-conn-enet0-root { > + compatible = "fixed-clock"; > + #clock-cells = <0>; > + clock-frequency = <250000000>; > + clock-output-names = "conn_enet0_root_clk"; > + }; > + > + eqos: ethernet@5b050000 { > + compatible = "nxp,imx8dxl-dwmac-eqos", "snps,dwmac-5.10a"; > + reg = <0x5b050000 0x10000>; > + interrupt-parent = <&gic>; > + interrupts = , > + ; > + interrupt-names = "eth_wake_irq", "macirq"; > + clocks = <&eqos_lpcg IMX_LPCG_CLK_2>, > + <&eqos_lpcg IMX_LPCG_CLK_4>, > + <&eqos_lpcg IMX_LPCG_CLK_0>, > + <&eqos_lpcg IMX_LPCG_CLK_3>, > + <&eqos_lpcg IMX_LPCG_CLK_1>; > + clock-names = "stmmaceth", "pclk", "ptp_ref", "tx", "mem"; > + assigned-clocks = <&clk IMX_SC_R_ENET_1 IMX_SC_PM_CLK_PER>; > + assigned-clock-rates = <125000000>; > + power-domains = <&pd IMX_SC_R_ENET_1>; > + status = "disabled"; > + }; > + > + usbotg2: usb@5b0e0000 { > + compatible = "fsl,imx8dxl-usb", "fsl,imx7ulp-usb"; > + reg = <0x5b0e0000 0x200>; > + interrupt-parent = <&gic>; > + interrupts = ; > + fsl,usbphy = <&usbphy2>; > + fsl,usbmisc = <&usbmisc2 0>; > + /* > + * usbotg1 and usbotg2 share one clock > + * scfw disable clock access and keep it always on > + * in case other core (M4) use one of these. > + */ > + clocks = <&clk_dummy>; > + ahb-burst-config = <0x0>; > + tx-burst-size-dword = <0x10>; > + rx-burst-size-dword = <0x10>; > + #stream-id-cells = <1>; Where do I find bindings for this property? Shawn > + power-domains = <&pd IMX_SC_R_USB_1>; > + status = "disabled"; > + }; > + > + usbmisc2: usbmisc@5b0e0200 { > + #index-cells = <1>; > + compatible = "fsl,imx8dxl-usbmisc", "fsl,imx7ulp-usbmisc"; > + reg = <0x5b0e0200 0x200>; > + }; > + > + usbphy2: usbphy@0x5b110000 { > + compatible = "fsl,imx8dxl-usbphy", "fsl,imx7ulp-usbphy"; > + reg = <0x5b110000 0x1000>; > + clocks = <&usb2_2_lpcg IMX_LPCG_CLK_7>; > + status = "disabled"; > + }; > + > + eqos_lpcg: clock-controller@5b240000 { > + compatible = "fsl,imx8qxp-lpcg"; > + reg = <0x5b240000 0x10000>; > + #clock-cells = <1>; > + clocks = <&conn_enet0_root_clk>, > + <&conn_axi_clk>, > + <&conn_axi_clk>, > + <&clk IMX_SC_R_ENET_1 IMX_SC_PM_CLK_PER>, > + <&conn_ipg_clk>; > + clock-indices = , > + , > + , > + , > + ; > + clock-output-names = "eqos_ptp", > + "eqos_mem_clk", > + "eqos_aclk", > + "eqos_clk", > + "eqos_csr_clk"; > + power-domains = <&pd IMX_SC_R_ENET_1>; > + }; > + > + usb2_2_lpcg: clock-controller@5b280000 { > + compatible = "fsl,imx8qxp-lpcg"; > + reg = <0x5b280000 0x10000>; > + #clock-cells = <1>; > + clock-indices = ; > + clocks = <&conn_ipg_clk>; > + clock-output-names = "usboh3_2_phy_ipg_clk"; > + }; > +}; > + > +&enet0_lpcg { > + clocks = <&conn_enet0_root_clk>, > + <&conn_enet0_root_clk>, > + <&conn_axi_clk>, > + <&clk IMX_SC_R_ENET_0 IMX_SC_C_TXCLK>, > + <&conn_ipg_clk>, > + <&conn_ipg_clk>; > +}; > + > +&fec1 { > + compatible = "fsl,imx8dxl-fec", "fsl,imx8qm-fec"; > + interrupts = , > + , > + , > + ; > + assigned-clocks = <&clk IMX_SC_R_ENET_0 IMX_SC_C_CLKDIV>; > + assigned-clock-rates = <125000000>; > +}; > + > +&usdhc1 { > + compatible = "fsl,imx8dxl-usdhc", "fsl,imx8qxp-usdhc"; > + interrupts = ; > +}; > + > +&usdhc2 { > + compatible = "fsl,imx8dxl-usdhc", "fsl,imx8qxp-usdhc"; > + interrupts = ; > +}; > + > +&usdhc3 { > + compatible = "fsl,imx8dxl-usdhc", "fsl,imx8qxp-usdhc"; > + interrupts = ; > +}; > -- > 2.34.1 > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel