From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 33FF0C433FE for ; Mon, 25 Apr 2022 23:55:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:From:Subject:Mime-Version: Message-Id:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To: References:List-Owner; bh=RkAL/UZrEOmSulrdm1UW88Avi2ZURNGbBmJmoChX+6k=; b=oIp Wh+MAmQ2jlmtZCQ43n61e8in4ELMTapJVb6HvVid6gkpvtdH2SEAsimHYiG04mVqRW7l2m525gmth F2fyMuy76rvrBmdFZhaAgygOmd7Vle/zl2ZBITt/z+xUgqafB9nnYkug902/YanmmawlkuDlzu2vN Q+k0U51IHPnoxp74Z81qXXLljWTPEemjjGKiZvRCkwqJYWf/TuWcsf44GUeO1uTajKi/rxP9PQc/x rIky9U68u3s3S37N2OMWca/pwMn5z0d5hCA+ou8yKbxZRgo5S+8eAgrGwjLCDquuUNrjSuitXBnMf PNJCXmbiHl2t1eWjvE6Pi5OdPKH9w2g==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nj8Wd-00Bkr9-7b; Mon, 25 Apr 2022 23:53:51 +0000 Received: from mail-oo1-xc49.google.com ([2607:f8b0:4864:20::c49]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nj8WZ-00BkpZ-4s for linux-arm-kernel@lists.infradead.org; Mon, 25 Apr 2022 23:53:48 +0000 Received: by mail-oo1-xc49.google.com with SMTP id z1-20020a4ab881000000b0035e678f8813so2712359ooo.2 for ; Mon, 25 Apr 2022 16:53:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=date:message-id:mime-version:subject:from:to:cc; bh=DcihtRyhxZSASrAxWYvG+vbHikEXUCwgp718CSC9bMo=; b=bxDlTykMwr9Eii5P0vs5td20RwMYWDrdaNaR3kKZ6vFMPHfRLG5jmjORyoP4POGF60 nA8phR2ww4MgrzN+LMPxGJbnSEDso7tQL9wckviWO+/d1JIoTst1Xwa/dk58wvUeVjls PfcbUhZVCEdviaAFb8SOKwHJ7v6guuTIGUAVf3AEF149Tx//Fq0j1mkofEIskSRN7/Ih z7aYDioOgYuIA6euhcoVCkZ5TjsZwpOFdAhJSWXOr/3YvLiOJrWoc/qrnP/fJIQIBCcE bL7ORzw1GtMnmr0yYEPa5SD1uwfXD7rURiQfC4d/AHIsn70korOgZqUm5PLbqXq0rZwk 7n5g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:message-id:mime-version:subject:from:to:cc; bh=DcihtRyhxZSASrAxWYvG+vbHikEXUCwgp718CSC9bMo=; b=jNN4lcFVlO/Gp1/591grdWRAHSxMGfqsYGdq8YFIcSjZJwMLNdUbAt7fcJlSVdbDJ6 pZ+5/xnnEJBs1dZzasrBbtPBC0qS2/6vxN/t7Sb7RGObJZWWfA5Xf1AUjTZ5yC7rJt+L v0iiHFu8+dN5hmn1vTCBEZcFplqZGYfdKqFC6SU+9l+QyZble9ElCLLg15lHIJNYy9tR 0M8lMl8inI84JG3S7GNAX7sZIyVg+CHwyDwNcH0lp4GxVa+kw4l8FPXeOVaZsa6cUWyz 6F7a+viWnzJwaq2UoVqtjSINbLTFbH3m5hREBoBs7dz8KX+oG0bOd2hyJ4FW9wiLzZgL MgJg== X-Gm-Message-State: AOAM531qv0cfXAyB6BepwwVwXQA50M5J3nJMr1pirkhmy60I/k7n+4fc AHYcwWEIFsamvfIg+Q8hNQ5o1Pz0MEU= X-Google-Smtp-Source: ABdhPJxKsgOjwnsQHHwzUCN10OQb3jAAYyq3y/pis69T7DTdEuFTR2EpQXnDB6jMJ7K6ExgV6uUQsRgVmh0= X-Received: from oupton3.c.googlers.com ([fda3:e722:ac3:cc00:24:72f4:c0a8:21eb]) (user=oupton job=sendgmr) by 2002:a05:6870:1481:b0:d7:30a3:1f39 with SMTP id k1-20020a056870148100b000d730a31f39mr12496597oab.14.1650930824850; Mon, 25 Apr 2022 16:53:44 -0700 (PDT) Date: Mon, 25 Apr 2022 23:53:37 +0000 Message-Id: <20220425235342.3210912-1-oupton@google.com> Mime-Version: 1.0 X-Mailer: git-send-email 2.36.0.rc2.479.g8af0fa9b8e-goog Subject: [PATCH v3 0/5] KVM: arm64: Limit feature register reads from AArch32 From: Oliver Upton To: kvmarm@lists.cs.columbia.edu Cc: kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, maz@kernel.org, james.morse@arm.com, alexandru.elisei@arm.com, suzuki.poulose@arm.com, reijiw@google.com, ricarkol@google.com, Oliver Upton X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220425_165347_248394_1096725E X-CRM114-Status: GOOD ( 14.81 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org KVM/arm64 does not restrict the guest's view of the AArch32 feature registers when read from AArch32. HCR_EL2.TID3 is cleared for AArch32 guests, meaning that register reads come straight from hardware. This is problematic as KVM relies on read_sanitised_ftr_reg() to expose a set of features consistent for a particular system. Appropriate handlers must first be put in place for CP10 and CP15 ID register accesses before setting TID3. Rather than exhaustively enumerating each of the encodings for CP10 and CP15 registers, take the lazy route and aim the register accesses at the AArch64 system register table. Patches 1-2 are small cleanups to how we handle register emulation failure. No functional change for current KVM, but required to do register emulation correctly in this series. Patch 3 reroutes the CP15 registers into the AArch64 table, taking care to immediately RAZ undefined ranges of registers. This is done to avoid possibly conflicting with encodings for future AArch64 registers. Patch 4 installs an exit handler for the CP10 ID registers and also relies on the general AArch64 register handler to implement reads. Finally, patch 5 actually sets TID3 for AArch32 guests, providing known-safe values for feature register accesses. There is an argument that the series is in fact a bug fix for running AArch32 VMs on heterogeneous systems. To that end, it could be blamed/backported to when we first knew better: 93390c0a1b20 ("arm64: KVM: Hide unsupported AArch64 CPU features from guests") But I left that tag off as in the aforementioned change skipping AArch32 was intentional. Up to you, Marc, if you want to call it a bugfix ;-) Applies cleanly to 5.18-rc4. Tested with AArch32 kvm-unit-tests and booting an AArch32 debian guest on a Raspberry Pi 4. Additionally, I tested AArch32 kvm-unit-tests w/ pmu={on,off} and saw no splat, as Alex had discovered [1]. The test correctly skips with the PMU feature bit disabled now. [1]: https://lore.kernel.org/r/20220425145530.723858-1-alexandru.elisei@arm.com v1: https://lore.kernel.org/kvmarm/20220329011301.1166265-1-oupton@google.com/ v2: https://lore.kernel.org/r/20220401010832.3425787-1-oupton@google.com v2 -> v3: - Collect R-b from Reiji (thanks!) - Adopt Marc's suggestion for CP15 register handling - Avoid writing to Rt when emulation fails (Marc) - Print some debug info on an unexpected CP10 register access (Reiji) v1 -> v2: - Actually set TID3! Oops. - Refactor kvm_emulate_cp15_id_reg() to check preconditions before proceeding to emulation (Reiji) - Tighten up comment on kvm_is_cp15_id_reg() to indicate that the only other trapped ID register (CTR) is already handled in the cp15 Oliver Upton (5): KVM: arm64: Return a bool from emulate_cp() KVM: arm64: Don't write to Rt unless sys_reg emulation succeeds KVM: arm64: Wire up CP15 feature registers to their AArch64 equivalents KVM: arm64: Plumb cp10 ID traps through the AArch64 sysreg handler KVM: arm64: Start trapping ID registers for 32 bit guests arch/arm64/include/asm/kvm_arm.h | 3 +- arch/arm64/include/asm/kvm_emulate.h | 7 - arch/arm64/include/asm/kvm_host.h | 1 + arch/arm64/kvm/handle_exit.c | 1 + arch/arm64/kvm/sys_regs.c | 197 +++++++++++++++++++++++---- arch/arm64/kvm/sys_regs.h | 7 + 6 files changed, 178 insertions(+), 38 deletions(-) -- 2.36.0.rc2.479.g8af0fa9b8e-goog _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel