From: Mark Brown <broonie@kernel.org>
To: Catalin Marinas <catalin.marinas@arm.com>, Will Deacon <will@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>,
Marc Zyngier <maz@kernel.org>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
linux-arm-kernel@lists.infradead.org,
Mark Brown <broonie@kernel.org>
Subject: [PATCH v6 01/12] arm64/sysreg: Introduce helpers for access to sysreg fields
Date: Tue, 3 May 2022 18:02:22 +0100 [thread overview]
Message-ID: <20220503170233.507788-2-broonie@kernel.org> (raw)
In-Reply-To: <20220503170233.507788-1-broonie@kernel.org>
The macros we define for the bitfields within sysregs have very regular
names, especially once we switch to automatic generation of those macros.
Take advantage of this to define wrappers around FIELD_PREP() allowing
us to simplify setting values in fields either numerically
SYS_FIELD_PREP(SCTLR_EL1, TCF0, 0x0)
or using the values of enumerations within the fields
SYS_FIELD_PREP_ENUM(SCTLR_EL1, TCF0, ASYMM)
Suggested-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
---
arch/arm64/include/asm/sysreg.h | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index fbf5f8bb9055..8543a315c5ca 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -1345,4 +1345,10 @@
#endif
+#define SYS_FIELD_PREP(reg, field, val) \
+ FIELD_PREP(reg##_##field##_MASK, val)
+
+#define SYS_FIELD_PREP_ENUM(reg, field, val) \
+ FIELD_PREP(reg##_##field##_MASK, reg##_##field##_##val)
+
#endif /* __ASM_SYSREG_H */
--
2.30.2
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next prev parent reply other threads:[~2022-05-03 17:04 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-03 17:02 [PATCH v6 00/12] arm64: Automatic system register definition generation Mark Brown
2022-05-03 17:02 ` Mark Brown [this message]
2022-05-03 17:02 ` [PATCH v6 02/12] arm64/mte: Make TCF0 naming and field values more standard Mark Brown
2022-05-03 17:02 ` [PATCH v6 03/12] arm64/mte: Make TCF field values and naming " Mark Brown
2022-05-04 13:26 ` Mark Rutland
2022-05-03 17:02 ` [PATCH v6 04/12] arm64/sysreg: Rename SCTLR_EL1_NTWE/TWI to SCTLR_EL1_nTWE/TWI Mark Brown
2022-05-03 17:02 ` [PATCH v6 05/12] arm64/sysreg: Define bits for previously RES1 fields in SCTLR_EL1 Mark Brown
2022-05-04 13:35 ` Mark Rutland
2022-05-03 17:02 ` [PATCH v6 06/12] arm64: Update name of ID_AA64ISAR0_EL1_ATOMIC to reflect ARM Mark Brown
2022-05-03 17:02 ` [PATCH v6 07/12] arm64/sysreg: Standardise ID_AA64ISAR0_EL1 macro names Mark Brown
2022-05-03 17:02 ` [PATCH v6 08/12] arm64: Add sysreg header generation scripting Mark Brown
2022-05-03 17:02 ` [PATCH v6 09/12] arm64/sysreg: Enable automatic generation of system register definitions Mark Brown
2022-05-03 17:02 ` [PATCH v6 10/12] arm64/sysreg: Generate definitions for ID_AA64ISAR0_EL1 Mark Brown
2022-05-03 17:02 ` [PATCH v6 11/12] arm64/sysreg: Generate definitions for TTBRn_EL1 Mark Brown
2022-05-03 17:02 ` [PATCH v6 12/12] arm64/sysreg: Generate definitions for SCTLR_EL1 Mark Brown
2022-05-04 16:32 ` Mark Rutland
2022-05-04 16:40 ` Mark Brown
2022-05-04 17:56 ` Catalin Marinas
2022-05-04 16:17 ` [PATCH v6 00/12] arm64: Automatic system register definition generation Catalin Marinas
2022-05-04 19:58 ` Catalin Marinas
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