* [PATCH 1/2] arm64: dts: imx8mm-beacon: Enable RTS-CTS on UART3
@ 2022-04-26 20:51 Adam Ford
2022-04-26 20:51 ` [PATCH 2/2] arm64: dts: imx8mn-beacon: " Adam Ford
2022-05-05 3:53 ` [PATCH 1/2] arm64: dts: imx8mm-beacon: " Shawn Guo
0 siblings, 2 replies; 3+ messages in thread
From: Adam Ford @ 2022-04-26 20:51 UTC (permalink / raw)
To: linux-arm-kernel; +Cc: shawnguo, aford, Adam Ford
There is a header for a DB9 serial port, but any attempts to use
hardware handshaking fail. Enable RTS and CTS pin muxing and enable
handshaking in the uart node.
Signed-off-by: Adam Ford <aford173@gmail.com>
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-beacon-baseboard.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-beacon-baseboard.dtsi
index ec3f2c177035..f338a886d811 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-beacon-baseboard.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm-beacon-baseboard.dtsi
@@ -278,6 +278,7 @@ &uart3 {
pinctrl-0 = <&pinctrl_uart3>;
assigned-clocks = <&clk IMX8MM_CLK_UART3>;
assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>;
+ uart-has-rtscts;
status = "okay";
};
@@ -386,6 +387,8 @@ pinctrl_uart3: uart3grp {
fsl,pins = <
MX8MM_IOMUXC_ECSPI1_SCLK_UART3_DCE_RX 0x40
MX8MM_IOMUXC_ECSPI1_MOSI_UART3_DCE_TX 0x40
+ MX8MM_IOMUXC_ECSPI1_MISO_UART3_DCE_CTS_B 0x40
+ MX8MM_IOMUXC_ECSPI1_SS0_UART3_DCE_RTS_B 0x40
>;
};
--
2.34.1
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^ permalink raw reply related [flat|nested] 3+ messages in thread
* [PATCH 2/2] arm64: dts: imx8mn-beacon: Enable RTS-CTS on UART3
2022-04-26 20:51 [PATCH 1/2] arm64: dts: imx8mm-beacon: Enable RTS-CTS on UART3 Adam Ford
@ 2022-04-26 20:51 ` Adam Ford
2022-05-05 3:53 ` [PATCH 1/2] arm64: dts: imx8mm-beacon: " Shawn Guo
1 sibling, 0 replies; 3+ messages in thread
From: Adam Ford @ 2022-04-26 20:51 UTC (permalink / raw)
To: linux-arm-kernel; +Cc: shawnguo, aford, Adam Ford
There is a header for a DB9 serial port, but any attempts to use
hardware handshaking fail. Enable RTS and CTS pin muxing and enable
handshaking in the uart node.
Signed-off-by: Adam Ford <aford173@gmail.com>
diff --git a/arch/arm64/boot/dts/freescale/imx8mn-beacon-baseboard.dtsi b/arch/arm64/boot/dts/freescale/imx8mn-beacon-baseboard.dtsi
index 0f40b43ac091..02f37dcda7ed 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn-beacon-baseboard.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn-beacon-baseboard.dtsi
@@ -175,6 +175,7 @@ &uart3 {
pinctrl-0 = <&pinctrl_uart3>;
assigned-clocks = <&clk IMX8MN_CLK_UART3>;
assigned-clock-parents = <&clk IMX8MN_SYS_PLL1_80M>;
+ uart-has-rtscts;
status = "okay";
};
@@ -258,6 +259,8 @@ pinctrl_uart3: uart3grp {
fsl,pins = <
MX8MN_IOMUXC_ECSPI1_SCLK_UART3_DCE_RX 0x40
MX8MN_IOMUXC_ECSPI1_MOSI_UART3_DCE_TX 0x40
+ MX8MN_IOMUXC_ECSPI1_MISO_UART3_DCE_CTS_B 0x40
+ MX8MN_IOMUXC_ECSPI1_SS0_UART3_DCE_RTS_B 0x40
>;
};
--
2.34.1
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH 1/2] arm64: dts: imx8mm-beacon: Enable RTS-CTS on UART3
2022-04-26 20:51 [PATCH 1/2] arm64: dts: imx8mm-beacon: Enable RTS-CTS on UART3 Adam Ford
2022-04-26 20:51 ` [PATCH 2/2] arm64: dts: imx8mn-beacon: " Adam Ford
@ 2022-05-05 3:53 ` Shawn Guo
1 sibling, 0 replies; 3+ messages in thread
From: Shawn Guo @ 2022-05-05 3:53 UTC (permalink / raw)
To: Adam Ford; +Cc: linux-arm-kernel, aford
On Tue, Apr 26, 2022 at 03:51:43PM -0500, Adam Ford wrote:
> There is a header for a DB9 serial port, but any attempts to use
> hardware handshaking fail. Enable RTS and CTS pin muxing and enable
> handshaking in the uart node.
>
> Signed-off-by: Adam Ford <aford173@gmail.com>
Applied both, thanks!
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 3+ messages in thread
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