From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 61464C433EF for ; Fri, 6 May 2022 13:27:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=nOKqk8qpRWg6OcFTZigtVfqt7IGo/KxAo368X7WEK7k=; b=cEAcWoGyeQoRC/ X+xN+jvASxPVa+zqcp9mzKshMJpDgxuAS3qdZ7gsAJbSyMoMzvJ18lP8tG4M53i/LoA7SiXv9yX3s leGbcG42DmrEtRhOc5UW0ro8VQXGa8aNj+dFxlbbP0RA9vb29D6p5eG3Uqo2anDDJqQYJ4fEWB7PG FyNVgd4Fgkck7Zk7geOepNRIZ/ehvoWs4FCK6taC7Wyd8FlF97j4DSluqBUOm+Yr2b6Y9eXZI9qfg /xGnHsRfTtWaGKCl31d7urXTjlXMOd2Kx4jThN32KBbw+onsG52c3p2FN+8p5hIEX9jetTqLyGSbL YSToY3OQ5vrYCNLqCf1Q==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nmxyA-003RJv-LU; Fri, 06 May 2022 13:26:06 +0000 Received: from mout.perfora.net ([74.208.4.194]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nmxwu-003Qew-KS for linux-arm-kernel@lists.infradead.org; Fri, 06 May 2022 13:24:50 +0000 Received: from toolbox.int.toradex.com ([81.221.85.15]) by mrelay.perfora.net (mreueus003 [74.208.5.2]) with ESMTPSA (Nemesis) id 0M1m9M-1o7X062cDS-00ti3N; Fri, 06 May 2022 15:24:41 +0200 From: Marcel Ziswiler To: linux-arm-kernel@lists.infradead.org Cc: Philippe Schenker , Denys Drozdov , Andrejs Cainikovs , Marcel Ziswiler , Fabio Estevam , Frank Rowand , Krzysztof Kozlowski , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Russell King , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 05/13] ARM: dts: imx6ull-colibri: update usdhc1 pixmux and signaling Date: Fri, 6 May 2022 15:24:08 +0200 Message-Id: <20220506132416.273965-6-marcel@ziswiler.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220506132416.273965-1-marcel@ziswiler.com> References: <20220506132416.273965-1-marcel@ziswiler.com> MIME-Version: 1.0 X-Provags-ID: V03:K1:9jTQUi0FQdHyIXM/FBLSNDoQB3bT5f3Hv89Zc84bMhDg/y7nJ7/ 2/JLhov/jxEpT8zyfPdT/wdPvF5Dj/cTicQon4W0hoi2RhQ/v2ewZxSEok2KsqD6MzVQ0FO aX3qp0YtySU/UlJGYDPf0Pcl3xi28uP8JDI1J5L+JJIWZYsKPxwQXY8CtR4NRV3J071Lqr3 DLkHTaxJ/xUFsH2PTMi0g== X-UI-Out-Filterresults: notjunk:1;V03:K0:g/cQV3B+G7E=:7iyZbjpogHAr47Oi4XQRu4 JpL3BLCqMQmyHuWqx6cbLy50F5Pc/q/nDcnlLZxVlRLXYVUAbE9tOVR+4XV8mutNCfW7ExmXE OsL/uWR5/pSV6H7pGAQOHpi7m2DRGY05KjRJNNTcoeEIccIqhSg7a5sUKxdMcq/7nw/4jtGMi 6HIU/4RerYITkwhBBUzX+Y2pljEAZWgeMSMWiZj2Tvn4unb/bu8xRZcChEDU5VS59zvN/J4Rz +kcdvcILBF4xCBi2CvQqoUBuLjwMwYVSRT/NlgSswL5FrcTQGi8X00fifsWk3zIJiugRJYrCF G+oeXPOqeFT4SoekEcdM2alAr8mjbqgpjo8cFd1pTSbUajbgXBzDXm/47VEZneV9m60WuWiUe vFvmlp4wSzr2pjZu53lPlhXck0ulFekmxTwjQiEEGwIJhTtlKH3iaoIfHKAxb4qdkAOfdz2gL SwSi/TlwftxPYMP3L8gxPb2HwgOSUkO4ldQTe3xC2zDlWcUY4t2IrdigEMf9zqFhNDSFlceP9 0OG8xj/GyMe1ptnciZjgpkpeL2fJHXqrqBswr8zwgG+FDv3k3msJW9FkwnymOJynHN1x3fkGe cSUO4Oxe4keym/779DVqBL8Rot59d0gswG9VJ5k2uGV1J33Uvth7iAIceO8epNRoFtL+BqWMT qU8kxGMRGHBU6dwmajnBZcBFCXKb+1DJ8LTS0w6BE+p9ciqzWJXTbuQVmdQ8hT8D96mg= X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220506_062448_813381_5B5921D4 X-CRM114-Status: GOOD ( 10.67 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Philippe Schenker Due to many carrier boards pulling the usdhc1 signals up to 3.3 volt we need to disable 1.8 volt signaling. Adding the no-1-8-v property basically disables UHS-I modes by default. Also pull-up the command and data lines to the +V3.3_1.8_SD rail and set them to the 200 MHz speed grade (e.g. pinmux bits 7-6: meaning 11 SPEED_3_max_200MHz). Explicitly specify a bus-width of <4> in the module-level device tree include file and drop the no-1-8-v property from the carrier boards device trees. Signed-off-by: Philippe Schenker Signed-off-by: Denys Drozdov Signed-off-by: Andrejs Cainikovs Signed-off-by: Marcel Ziswiler --- (no changes since v1) .../arm/boot/dts/imx6ull-colibri-eval-v3.dtsi | 14 -------- arch/arm/boot/dts/imx6ull-colibri.dtsi | 36 ++++++++++++------- 2 files changed, 24 insertions(+), 26 deletions(-) diff --git a/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi index a78849fd2afa..ea086b305d22 100644 --- a/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi +++ b/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi @@ -159,20 +159,6 @@ &usbotg2 { }; &usdhc1 { - pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep"; - pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_snvs_usdhc1_cd>; - pinctrl-1 = <&pinctrl_usdhc1_100mhz &pinctrl_snvs_usdhc1_cd>; - pinctrl-2 = <&pinctrl_usdhc1_200mhz &pinctrl_snvs_usdhc1_cd>; - pinctrl-3 = <&pinctrl_usdhc1 &pinctrl_snvs_usdhc1_sleep_cd>; - cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>; - disable-wp; - wakeup-source; - keep-power-in-suspend; vmmc-supply = <®_3v3>; - vqmmc-supply = <®_sd1_vmmc>; - sd-uhs-sdr12; - sd-uhs-sdr25; - sd-uhs-sdr50; - sd-uhs-sdr104; status = "okay"; }; diff --git a/arch/arm/boot/dts/imx6ull-colibri.dtsi b/arch/arm/boot/dts/imx6ull-colibri.dtsi index c89b209be316..351ea2acd5a6 100644 --- a/arch/arm/boot/dts/imx6ull-colibri.dtsi +++ b/arch/arm/boot/dts/imx6ull-colibri.dtsi @@ -35,7 +35,7 @@ reg_module_3v3_avdd: regulator-module-3v3-avdd { regulator-max-microvolt = <3300000>; }; - reg_sd1_vmmc: regulator-sd1-vmmc { + reg_sd1_vqmmc: regulator-sd1-vqmmc { compatible = "regulator-gpio"; gpio = <&gpio5 9 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; @@ -232,9 +232,21 @@ &usbotg2 { }; &usdhc1 { + pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep"; + pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_snvs_usdhc1_cd>; + pinctrl-1 = <&pinctrl_usdhc1_100mhz &pinctrl_snvs_usdhc1_cd>; + pinctrl-2 = <&pinctrl_usdhc1_200mhz &pinctrl_snvs_usdhc1_cd>; + pinctrl-3 = <&pinctrl_usdhc1 &pinctrl_snvs_usdhc1_sleep_cd>; assigned-clocks = <&clks IMX6UL_CLK_USDHC1_SEL>, <&clks IMX6UL_CLK_USDHC1>; assigned-clock-parents = <&clks IMX6UL_CLK_PLL2_PFD2>; assigned-clock-rates = <0>, <198000000>; + bus-width = <4>; + cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>; + disable-wp; + keep-power-in-suspend; + no-1-8-v; + vqmmc-supply = <®_sd1_vqmmc>; + wakeup-source; }; &wdog1 { @@ -550,8 +562,8 @@ MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0x10b0 /* SODIMM 129 */ pinctrl_usdhc1: usdhc1-grp { fsl,pins = < - MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x17059 /* SODIMM 47 */ - MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x10059 /* SODIMM 190 */ + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059 /* SODIMM 47 */ + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059 /* SODIMM 190 */ MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059 /* SODIMM 192 */ MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059 /* SODIMM 49 */ MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059 /* SODIMM 51 */ @@ -561,8 +573,8 @@ MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059 /* SODIMM 53 */ pinctrl_usdhc1_100mhz: usdhc1-100mhz-grp { fsl,pins = < - MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x170b9 - MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x100b9 + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100b9 + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170b9 MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9 MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9 MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9 @@ -572,12 +584,12 @@ MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9 pinctrl_usdhc1_200mhz: usdhc1-200mhz-grp { fsl,pins = < - MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x170f9 - MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x100f9 - MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9 - MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9 - MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9 - MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9 + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100f9 + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170f9 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9 >; }; @@ -588,7 +600,7 @@ MX6UL_PAD_CSI_DATA01__USDHC2_DATA1 0x17069 MX6UL_PAD_CSI_DATA02__USDHC2_DATA2 0x17069 MX6UL_PAD_CSI_DATA03__USDHC2_DATA3 0x17069 MX6UL_PAD_CSI_HSYNC__USDHC2_CMD 0x17069 - MX6UL_PAD_CSI_VSYNC__USDHC2_CLK 0x17069 + MX6UL_PAD_CSI_VSYNC__USDHC2_CLK 0x10069 MX6UL_PAD_GPIO1_IO03__OSC32K_32K_OUT 0x10 >; -- 2.35.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel