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Fri, 13 May 2022 13:45:59 +0000 Date: Fri, 13 May 2022 14:45:52 +0100 From: Joey Gouly To: Mark Rutland CC: , , , , Subject: Re: [PATCH 3/3] irqchip/gic-v3: fix priority mask handling Message-ID: <20220513134552.GA35971@e124191.cambridge.arm.com> References: <20220513133038.226182-1-mark.rutland@arm.com> <20220513133038.226182-4-mark.rutland@arm.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20220513133038.226182-4-mark.rutland@arm.com> User-Agent: Mutt/1.9.4 (2018-02-28) X-EOPAttributedMessage: 1 X-MS-Office365-Filtering-Correlation-Id: e263c6ab-af26-4ebb-e4d7-08da34e6ec9a X-MS-TrafficTypeDiagnostic: VI1PR08MB3600:EE_|DBAEUR03FT022:EE_|VI1PR08MB5344:EE_ X-Microsoft-Antispam-PRVS: x-checkrecipientrouted: true NoDisclaimer: true X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam-Untrusted: BCL:0; X-Microsoft-Antispam-Message-Info-Original: 1y2lHHLuQATjqu1mfT2N4F766sU0pIuzO7YagS+cTPskYoBqj0l3ndyyXDs5o34gXadftv5WmKQ/lDBB++nNCPLfidfTQlIitixha2q5mEMxx8fafIWN3IuzXdF+0WpJ+1b8mzsuf+Ib9fJ3nPLH3JzmlyEmxOxnfB3D8P5X50nBM7sBMQ/cxh22jCpvFvciE+Uv9CfIdoabvs3hX5MpL/Fdy93G5ss6LuA8OEiCUJ1/IiaRLds5B8KQGNlaWbdH7wzgPjO6RGZpkJMghpBZGn4lXwzzBY96EGuAs9xKuj6rn5vEdVPO9Ap1qb1/M5wDyE534h/BCSl4+uHANocQSDbvEXF7nx+WSH7RsxTKnwIGkUBtFENNfKjkN/j8h2odnLiEtfQlTxftDTlrJtCAq8ghvBPAzK0ZzL8C8qPqZ7fpUmrcDFGnvDR/X+eSOjw++u5F85BzWXB0vJvyEiFf93aXihaVrkgSR6pXKTZkD2qjpDadPAYm+JpIKMTFPfc+dYQIVmQ9/m4USfVxDOEaiIzMXwZ0fR4+PbDcBpU0wXMjov70T1M1BmhbJ5F8OSt/+zC7C0rG1N3SLmZ7OH98E14jIlKDBLCc6UNmNPyAUwDYLFh9VJATNDc2PBPRLuUkupoor+0cbjHL/8+W2gkqXhGr1j8c6ZGQU6lXSlXM01ZifsJ8Z+YJt6/Du1H4OVfO1hax/Zn3T4xEj6gvAxrO8w== X-Forefront-Antispam-Report-Untrusted: CIP:40.67.248.234; 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charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Mark, On Fri, May 13, 2022 at 02:30:38PM +0100, Mark Rutland wrote: > When a kernel is built with CONFIG_ARM64_PSEUDO_NMI=y and pseudo-NMIs > are enabled at runtime, GICv3's gic_handle_irq() can leave DAIF and > ICC_PMR_EL1 in an unexpected state in some cases, breaking subsequent > usage of local_irq_enable() and resulting in softirqs being run with > IRQs erroneously masked (possibly resulting in deadlocks). > > This can happen when an IRQ exception is taken from a context where > regular IRQs were unmasked, and either: > > (1) ICC_IAR1_EL1 indicates a special INTID (e.g. as a result of an IRQ > being withdrawn since the IRQ exception was taken). > > (2) ICC_IAR1_EL1 and ICC_RPR_EL1 indicate an NMI was acknowledged. > > When an NMI is taken from a context where regular IRQs were masked, > there is no problem. > [..] > +/* > + * An exception has been taken from a context with IRQs enabled, which can only I think this should be: IRQs *disabled*? > + * be an NMI. > + * > + * The entry code called us with DAIF.IF set to keep NMIs masked. We must leave > + * DAIF.IF (and ICC_PMR_EL1) unchanged. > + * > + * The entry code has performed NMI entry. > + */ > +static void __gic_handle_irq_from_irqsoff(struct pt_regs *regs) > +{ > + u64 pmr; > + u32 irqnr; > + > + /* > + * We were in a context with IRQs disabled. However, the > + * entry code has set PMR to a value that allows any > + * interrupt to be acknowledged, and not just NMIs. This can > + * lead to surprising effects if the NMI has been retired in > + * the meantime, and that there is an IRQ pending. The IRQ > + * would then be taken in NMI context, something that nobody > + * wants to debug twice. > + * > + * Until we sort this, drop PMR again to a level that will > + * actually only allow NMIs before reading IAR, and then > + * restore it to what it was. > + */ > + pmr = gic_read_pmr(); > + gic_pmr_mask_irqs(); > + isb(); > + irqnr = gic_read_iar(); > + gic_write_pmr(pmr); > + > + __gic_handle_nmi(irqnr, regs); > +} Thanks, Joey _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel