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[66.90.144.107]) by smtp.gmail.com with ESMTPSA id g24-20020a9d6198000000b0060603221255sm39371otk.37.2022.05.17.11.31.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 17 May 2022 11:31:55 -0700 (PDT) Received: (nullmailer pid 1380610 invoked by uid 1000); Tue, 17 May 2022 18:31:54 -0000 Date: Tue, 17 May 2022 13:31:54 -0500 From: Rob Herring To: Chia-Wei Wang Cc: joel@jms.id.au, andrew@aj.id.au, jk@codeconstruct.com.au, a.kartashev@yadro.com, patrick.rudolph@9elements.com, dphadke@linux.microsoft.com, linux-aspeed@lists.ozlabs.org, openbmc@lists.ozlabs.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, ryan_chen@aspeedtech.com Subject: Re: [PATCH v5 1/4] dt-bindings: aspeed: Add eSPI controller Message-ID: <20220517183154.GA1352926-robh@kernel.org> References: <20220516005412.4844-1-chiawei_wang@aspeedtech.com> <20220516005412.4844-2-chiawei_wang@aspeedtech.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20220516005412.4844-2-chiawei_wang@aspeedtech.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220517_113200_381085_721C8814 X-CRM114-Status: GOOD ( 22.63 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, May 16, 2022 at 08:54:09AM +0800, Chia-Wei Wang wrote: > Add dt-bindings for Aspeed eSPI controller > > Signed-off-by: Chia-Wei Wang > --- > .../devicetree/bindings/soc/aspeed/espi.yaml | 162 ++++++++++++++++++ bindings/spi/ includes SPI slaves. Is there a reason this doesn't fit there? > 1 file changed, 162 insertions(+) > create mode 100644 Documentation/devicetree/bindings/soc/aspeed/espi.yaml > > diff --git a/Documentation/devicetree/bindings/soc/aspeed/espi.yaml b/Documentation/devicetree/bindings/soc/aspeed/espi.yaml > new file mode 100644 > index 000000000000..aa91ec8caf6a > --- /dev/null > +++ b/Documentation/devicetree/bindings/soc/aspeed/espi.yaml > @@ -0,0 +1,162 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +# # Copyright (c) 2021 Aspeed Technology Inc. > +%YAML 1.2 > +--- > +$id: "http://devicetree.org/schemas/soc/aspeed/espi.yaml#" > +$schema: "http://devicetree.org/meta-schemas/core.yaml#" > + > +title: Aspeed eSPI Controller > + > +maintainers: > + - Chia-Wei Wang > + - Ryan Chen > + > +description: > + Aspeed eSPI controller implements a slave side eSPI endpoint device > + supporting the four eSPI channels, namely peripheral, virtual wire, > + out-of-band, and flash. > + > +properties: > + compatible: > + items: > + - enum: > + - aspeed,ast2500-espi > + - aspeed,ast2600-espi > + - const: simple-mfd > + - const: syscon > + > + reg: > + maxItems: 1 > + > + "#address-cells": > + const: 1 > + > + "#size-cells": > + const: 1 > + > + ranges: true > + > +patternProperties: > + "^espi-ctrl@[0-9a-f]+$": > + type: object > + > + description: Control of the four basic eSPI channels > + > + properties: > + compatible: > + items: > + - enum: > + - aspeed,ast2500-espi-ctrl > + - aspeed,ast2600-espi-ctrl > + > + interrupts: > + maxItems: 1 > + > + clocks: > + maxItems: 1 > + > + perif,memcyc-enable: What vendor is 'perif'? > + type: boolean > + description: Enable memory cycle over eSPI peripheral channel > + > + perif,memcyc-src-addr: > + $ref: /schemas/types.yaml#/definitions/uint32 > + description: The Host side address to be decoded into the memory cycle over eSPI peripheral channel > + > + perif,memcyc-size: > + $ref: /schemas/types.yaml#/definitions/uint32 > + description: The size of the memory region allocated for the memory cycle over eSPI peripheral channel > + minimum: 65536 This region is defined by the h/w or just some carveout of system memory? In the former, perhaps this should be part of 'reg'. In the latter case, use a /reserved-memory node and memory-region here. > + > + perif,dma-mode: > + type: boolean > + description: Enable DMA support for eSPI peripheral channel > + > + oob,dma-mode: What vendor is 'oob'? > + type: boolean > + description: Enable DMA support for eSPI out-of-band channel > + > + oob,dma-tx-desc-num: > + $ref: /schemas/types.yaml#/definitions/uint32 > + minimum: 2 > + maximum: 1023 > + description: The number of TX descriptors available for eSPI OOB DMA engine > + > + oob,dma-rx-desc-num: > + $ref: /schemas/types.yaml#/definitions/uint32 > + minimum: 2 > + maximum: 1023 > + description: The number of RX descriptors available for eSPI OOB DMA engine > + > + flash,dma-mode: > + type: boolean > + description: Enable DMA support for eSPI flash channel Why does this need to be in DT. It's configuration. > + > + flash,safs-mode: > + $ref: /schemas/types.yaml#/definitions/uint32 > + enum: [ 0, 1, 2 ] > + default: 0 > + description: Slave-Attached-Sharing-Flash mode, 0->Mix, 1->SW, 2->HW > + > + dependencies: > + perif,memcyc-src-addr: [ "perif,memcyc-enable" ] > + perif,memcyc-size: [ "perif,memcyc-enable" ] > + oob,dma-tx-desc-num: [ "oob,dma-mode" ] > + oob,dma-rx-desc-num: [ "oob,dma-mode" ] > + > + required: > + - compatible > + - interrupts > + - clocks > + > + "^espi-mmbi@[0-9a-f]+$": > + type: object > + > + description: Control of the PCH-BMC data exchange over eSPI peripheral memory cycle > + > + properties: > + compatible: > + const: aspeed,ast2600-espi-mmbi > + > + interrupts: > + maxItems: 1 > + > + required: > + - compatible > + - interrupts > + > +required: > + - compatible > + - reg > + - "#address-cells" > + - "#size-cells" > + - ranges > + > +additionalProperties: false > + > +examples: > + - | > + #include > + #include > + > + espi: espi@1e6ee000 { > + compatible = "aspeed,ast2600-espi", "simple-mfd", "syscon"; > + reg = <0x1e6ee000 0x1000>; > + > + #address-cells = <1>; > + #size-cells = <1>; > + ranges = <0x0 0x1e6ee000 0x1000>; > + > + espi_ctrl: espi-ctrl@0 { > + compatible = "aspeed,ast2600-espi-ctrl"; > + reg = <0x0 0x800>; > + interrupts = ; > + clocks = <&syscon ASPEED_CLK_GATE_ESPICLK>; > + }; > + > + espi_mmbi: espi-mmbi@800 { > + compatible = "aspeed,ast2600-espi-mmbi"; > + reg = <0x800 0x50>; > + interrupts = ; > + }; Why do you need these child nodes? Are the subblocks somehow useful on their own or reuseable in another configuration? If not, looks like this could all be 1 node. Rob _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel