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From: Leo Yan <leo.yan@linaro.org>
To: James Clark <james.clark@arm.com>
Cc: linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org,
	broonie@kernel.org, acme@kernel.org, german.gomez@arm.com,
	mathieu.poirier@linaro.org, john.garry@huawei.com,
	Will Deacon <will@kernel.org>, Mike Leach <mike.leach@linaro.org>,
	Peter Zijlstra <peterz@infradead.org>,
	Ingo Molnar <mingo@redhat.com>,
	Mark Rutland <mark.rutland@arm.com>,
	Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	Jiri Olsa <jolsa@kernel.org>, Namhyung Kim <namhyung@kernel.org>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2 4/4] perf tools: arm64: Add support for VG register
Date: Wed, 18 May 2022 17:57:35 +0800	[thread overview]
Message-ID: <20220518095735.GB430350@leoy-ThinkPad-X240s> (raw)
In-Reply-To: <ca02e8f5-04bd-01ff-7b57-0fd08a1e2359@arm.com>

On Wed, May 18, 2022 at 10:44:57AM +0100, James Clark wrote:

[...]

> >> +	if (getauxval(AT_HWCAP) & HWCAP_SVE)
> >> +		attr.sample_regs_user |= SMPL_REG_MASK(PERF_REG_ARM64_VG);
> >> +
> >> +	/*
> >> +	 * Check if the pmu supports perf extended regs, before
> >> +	 * returning the register mask to sample.
> >> +	 */
> >> +	if (attr.sample_regs_user != PERF_REGS_MASK) {
> >> +		event_attr_init(&attr);
> >> +		fd = sys_perf_event_open(&attr, 0, -1, -1, 0);
> >> +		if (fd != -1) {
> >> +			close(fd);
> >> +			return attr.sample_regs_user;
> >> +		}
> >> +	}
> > 
> > Just curious, since we can know SVE is supported from reading
> > auxiliary value, can we directly return the register mask as below?
> > 
> >   PERF_REGS_MASK | SMPL_REG_MASK(PERF_REG_ARM64_VG);
> 
> I was trying to cover the case where the system supports SVE, but
> the kernel doesn't have my changes to add the VG register yet.
> 
> Technically I could just attempt to open the event without checking
> for SVE first and see if it works or not. But I preferred to be
> explicit so it's obvious why we're doing that.

Understand; LGTM.

Reviewed-by: Leo Yan <leo.yan@linaro.org>

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  reply	other threads:[~2022-05-18  9:58 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-17 10:20 [PATCH v2 0/2] perf: arm64: Tools support for Dwarf unwinding through SVE functions James Clark
2022-05-17 10:20 ` [PATCH v2 1/4] perf tools: arm64: Copy perf_regs.h from the kernel James Clark
2022-05-17 10:50   ` Leo Yan
2022-05-17 10:20 ` [PATCH v2 2/4] perf tools: Use dynamic register set for Dwarf unwind James Clark
2022-05-17 11:03   ` Leo Yan
2022-05-18 13:25     ` James Clark
2022-05-18 14:00       ` Leo Yan
2022-05-17 10:20 ` [PATCH v2 3/4] perf tools: arm64: Decouple Libunwind register names from Perf James Clark
2022-05-17 12:54   ` Leo Yan
2022-05-17 10:20 ` [PATCH v2 4/4] perf tools: arm64: Add support for VG register James Clark
2022-05-17 13:19   ` Leo Yan
2022-05-18  9:44     ` James Clark
2022-05-18  9:57       ` Leo Yan [this message]
2022-05-17 14:58 ` [PATCH v2 0/2] perf: arm64: Tools support for Dwarf unwinding through SVE functions Arnaldo Carvalho de Melo
2022-05-20 11:46   ` German Gomez
2022-05-20 12:32     ` Arnaldo Carvalho de Melo
2022-05-20 14:52       ` James Clark

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