From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id F3C4CC433EF for ; Sat, 11 Jun 2022 08:49:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=BkhkGaTT7nSMxUL7VHn3WB02OU4YZLB9oh07cK8721U=; b=UTqYYBmPuE9axe UXPU2EblbGoRqHdOor2N95x0O8gl1uy9X7tear7N6xeqwdT8HBsYFWJJ5RqcSqkmwDNeN3mkfPHQO BpkXveub6da0qZWSu7Cgh0oJdQasx/LlVZm8j6W2Po7D+9u7dHKD9CWAS81zn0hezdxjPvu3U07ek Xofm3uqsflmwSCKCdB041AYd1SC7hVysGApCvbNjxEu0l26Y/1JdRHfGUVspelCaizsvumWaKe/0N nYMfYbW4lwzhcPdykNjMPWgoyGVEJYkM+Ys2XjEW0d3R0h/6LHFof8vTO6LwCO/GwuTC3hDQxBNvT /ljb3oMqN8C3R3fNCZzw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nzwmi-00C7iH-UU; Sat, 11 Jun 2022 08:47:57 +0000 Received: from dfw.source.kernel.org ([139.178.84.217]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nzwmg-00C7hm-7C for linux-arm-kernel@lists.infradead.org; Sat, 11 Jun 2022 08:47:55 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id D6508612DB; Sat, 11 Jun 2022 08:47:52 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 87E37C34116; Sat, 11 Jun 2022 08:47:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1654937272; bh=sRLrEkvhglH4IfunJFeKGLzOQUk1wg3Go1R2KwI5giA=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=CvCxdQu6la3i7qSwXtwdUhIzMPNzpvXHWtNjAbUkrCBFfRCWF6MAkpwKvhfd160CR CJq8hMWiObOykZu08W7SFVKUytRKfd8b+awET6sN7NFDDMzEHAEkPuGhIVRXuxa2Il CWUJ2B3mB05N41VIVFtNw66j3gWJMj99sp+kQpBwyrDe6turQ8r2xB+qPqQF8UA7+F AP1dVZdpGZ0IdX1/pVXFpkZbLV9bWThVCKq8ftc30oBzU6t2qbJuEFqW1aDhTTPKq1 JyFfbpwCF+54oAnKRaob2BTxrQ1GOcSp8nVYUmqhnTW95T5OcZXsq+7cPC4oU0HLgf 9lEgxpV4fRlyw== Date: Sat, 11 Jun 2022 16:47:46 +0800 From: Shawn Guo To: Lucas Stach Cc: Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , linux-arm-kernel@lists.infradead.org, patchwork-lst@pengutronix.de Subject: Re: [PATCH] ARM: dts: imx6qdl: correct PU regulator ramp delay Message-ID: <20220611084746.GE254723@dragon> References: <20220511160823.1436562-1-l.stach@pengutronix.de> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20220511160823.1436562-1-l.stach@pengutronix.de> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220611_014754_340833_ADB2B814 X-CRM114-Status: GOOD ( 19.33 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, May 11, 2022 at 06:08:23PM +0200, Lucas Stach wrote: > Contrary to what was believed at the time, the ramp delay of 150us is not > plenty for the PU LDO with the default step time of 512 pulses of the 24MHz > clock. Measurements have shown that after enabling the LDO the voltage on > VDDPU_CAP jumps to ~750mV in the first step and after that the regulator > executes the normal ramp up as defined by the step size control. > > This means it takes the regulator between 360us and 370us to ramp up to > the nominal 1.15V voltage for this power domain. With the old setting of > the ramp delay the power up of the PU GPC domain would happen in the middle > of the regulator ramp with the voltage being at around 900mV. Apparently > this was enough for most units to properly power up the peripherals in the > domain and execute the reset. Some units however, fail to power up properly, > especially when the chip is at a low temperature. In that case any access > to the GPU registers would yield an incorrect result with no way to recover > from this situation. > > Change the ramp delay to 380us to cover the measured ramp up time with a > bit of additional slack. > > Fixes: 40130d327f72 ("ARM: dts: imx6qdl: Allow disabling the PU regulator, > add a enable ramp delay") > Signed-off-by: Lucas Stach Applied, thanks! _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel